Patents by Inventor Peter Bösmüller

Peter Bösmüller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8604761
    Abstract: In one embodiment, the current source arrangement comprises a current source (B), that has two output terminals (102, 103) and a control input (101) to be supplied with a control voltage (Vgs) and is set up to provide a current (I) as a function of a voltage (Vds) at the output terminals (102, 103) and the control voltage (Vgs), an operating point adjustment unit (E) that is supplied with an actual value (Vi) proportional to an actual value of the current (I) and is set up to provide the control voltage (Vgs) as a function of the actual value (Vi) and a predetermined target value (Iz) of the current (I), and a comparison unit (A) coupled to the control input (101) of the current source (B) for providing a monitoring signal (100), wherein the monitoring signal (100) is provided as a function of a predetermined limit voltage (VG) and the control voltage (Vgs). A method for operating a current source arrangement is also specified.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: December 10, 2013
    Assignee: AMS AG
    Inventors: Gilbert Promitzer, Peter Rust, Peter Boesmueller
  • Patent number: 8270192
    Abstract: A circuit arrangement comprises a memory cell array (2) with at least one memory circuit (99). The memory circuit (99) comprises one non-volatile memory cell (98) inserted in a first current path (106) between a supply voltage terminal (9) and a reference potential terminal (8), and a volatile memory cell (97) inserted in a second current path (107) between the supply voltage terminal (9) and the reference potential terminal (8). The volatile memory cell (97) is coupled to the non-volatile memory cell (98) for reading the non-volatile memory cell (98).
    Type: Grant
    Filed: November 14, 2007
    Date of Patent: September 18, 2012
    Assignee: Austriamicrosystems AG
    Inventors: Peter Bösmüller, Johannes Fellner
  • Publication number: 20110291633
    Abstract: In one embodiment, the current source arrangement comprises a current source (B), that has two output terminals (102, 103) and a control input (101) to be supplied with a control voltage (Vgs) and is set up to provide a current (I) as a function of a voltage (Vds) at the output terminals (102, 103) and the control voltage (Vgs), an operating point adjustment unit (E) that is supplied with an actual value (Vi) proportional to an actual value of the current (I) and is set up to provide the control voltage (Vgs) as a function of the actual value (Vi) and a predetermined target value (Iz) of the current (I), and a comparison unit (A) coupled to the control input (101) of the current source (B) for providing a monitoring signal (100), wherein the monitoring signal (100) is provided as a function of a predetermined limit voltage (VG) and the control voltage (Vgs). A method for operating a current source arrangement is also specified.
    Type: Application
    Filed: June 1, 2011
    Publication date: December 1, 2011
    Applicant: austriamicrosystems AG
    Inventors: Gilbert PROMITZER, Peter Rust, Peter Boesmueller
  • Patent number: 7995367
    Abstract: The circuit arrangement comprises a symmetrically constructed comparator (3), a non-volatile memory cell (10) and a reference element (20). The comparator (3) exhibits a latching function, and is connected in a differential current path that joins the power supply terminal (9) to a reference potential terminal (8). The non-volatile memory cell (10) is connected in a first branch (35) of the differential current path, and the reference element (20) is connected in a second branch (55) of the differential current path.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: August 9, 2011
    Assignee: austriamicrosystems AG
    Inventors: Peter Bösmüller, Johannes Fellner, Gregor Schatzberger
  • Publication number: 20100061131
    Abstract: A circuit arrangement comprises a memory cell array (2) with at least one memory circuit (99). The memory circuit (99) comprises one non-volatile memory cell (98) inserted in a first current path (106) between a supply voltage terminal (9) and a reference potential terminal (8), and a volatile memory cell (97) inserted in a second current path (107) between the supply voltage terminal (9) and the reference potential terminal (8). The volatile memory cell (97) is coupled to the non-volatile memory cell (98) for reading the non-volatile memory cell (98).
    Type: Application
    Filed: November 14, 2007
    Publication date: March 11, 2010
    Applicant: austriamicrosystems AG
    Inventors: Peter Bösmüller, Johannes Fellner
  • Publication number: 20090219746
    Abstract: The circuit arrangement comprises a symmetrically constructed comparator (3), a non-volatile memory cell (10) and a reference element (20). The comparator (3) exhibits a latching function, and is connected in a differential current path that joins the power supply terminal (9) to a reference potential terminal (8). The non-volatile memory cell (10) is connected in a first branch (35) of the differential current path, and the reference element (20) is connected in a second branch (55) of the differential current path.
    Type: Application
    Filed: April 12, 2007
    Publication date: September 3, 2009
    Applicant: Austriamicrosytems AG
    Inventors: Peter Bösmüller, Johannes Fellner, Gregor Schatzberger