Patents by Inventor Peter Bakker
Peter Bakker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240262658Abstract: A crane assembly for erecting a tower from a plurality of tower sections includes a first telescopic mast connected to a second telescopic mast. A crane is mounted on top of the first telescopic mast. The first telescopic mast is configured to increase in length from a retracted state in a first direction and includes a first clamp assembly that selectively grips portions of the tower. The second telescopic mast is configured to increase in length from a retracted state in a second direction opposite to the first direction and includes a second clamp assembly that selectively grips portions of the tower.Type: ApplicationFiled: May 25, 2022Publication date: August 8, 2024Inventors: Daniel GOMEZ MORA, Joel FRAX CERVERA, Cornelis Josephus Andreas VAN SON, Louweris Rémon KALTER, Lance Lambertus Peter BAKKER, Aris Jan van EGDOM, Frank ROZEBOOM, Dries Vis VIS, Willem Haje BOER
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Publication number: 20240142496Abstract: The present disclosure generally relates to a conductive perforated plate for electrical testing of a device under test (DUT) in semiconductor processing. In an example, a device circuit in a die area is formed in or over a semiconductor substrate. The device circuit has an interconnect level. A DUT is formed in or over the semiconductor substrate. A conductive perforated plate is formed in the interconnect level conductively connected to the DUT. A plurality of insulating islands is disposed within the conductive perforated plate.Type: ApplicationFiled: October 27, 2022Publication date: May 2, 2024Inventors: Wolfgang Weiss, Anton Johann Bayerstadler, Peter Bakker
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Publication number: 20240006353Abstract: In examples, a semiconductor package comprises a bond pad surface layer, a second conductive layer positioned below the bond pad surface layer, and a perforated plate positioned between and abutting the bond pad surface layer and the second conductive layer. The perforated plate has a monolithic conductive member and multiple insulation members embedded within the conductive member, the insulation members having thicknesses approximately equivalent to that of the conductive member. The package also includes a semiconductor substrate including a circuit, the semiconductor substrate positioned below the second conductive layer.Type: ApplicationFiled: June 30, 2022Publication date: January 4, 2024Inventors: Anton Johann BAYERSTADLER, Christian SCHMITT, Peter BAKKER
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Patent number: 11077050Abstract: The instant invention provides pharmaceutical formulations for a long acting injectable drug product comprising a suspension of doravirine for parenteral administration via intramuscular or subcutaneous routes. The drug product can be used for the treatment or prophylaxis of infection by HIV or for the treatment, prophylaxis, or delay in the onset of AIDS (acquired immunodeficiency syndrome) or ARC (AIDS related complex).Type: GrantFiled: March 19, 2018Date of Patent: August 3, 2021Assignees: Merck Sharp & Dohme Corp., Merck Sharp & Dohme B.V.Inventors: Sachin Mittal, Irina Kazakevich, Himanshu Bhattacharjee, Peter Bakker, Luke Schenck, David J. Goldfarb, Amitava Mitra, Donna Carroll, Nazia Khawaja
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Publication number: 20200289406Abstract: The instant invention provides pharmaceutical formulations for a long acting injectable drug product comprising a suspension of doravirine for parenteral administration via intramuscular or subcutaneous routes. The drug product can be used for the treatment or prophylaxis of infection by HIV or for the treatment, prophylaxis, or delay in the onset of AIDS (acquired immunodeficiency syndrome) or ARC (AIDS related complex).Type: ApplicationFiled: March 19, 2018Publication date: September 17, 2020Applicants: MERCK SHARP & DOHME CORP., MERCK SHARP & DOHME B. V.Inventors: Sachin Mittal, Irina Kazakevich, Himanshu Bhattacharjee, Peter Bakker, Luke Schenck, David J. Goldfarb, Amitava Mitra, Donna Carroll, Nazia Khawaja
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Patent number: 9291558Abstract: A sensor comprising a substrate (100) having a first surface (105) and a second surface (110) is described. The first surface has at least one sensor site (115) provided thereon. The substrate is configured such that on excitation of a sample provided at the sensor site, luminescence originating from the sensor site propagates into the substrate, the second surface of the substrate being configured to selectively transmit the luminescence propagating within the substrates at angles greater than the critical angle out of the substrate where it may be detected by a detector (160) provided below the substrate.Type: GrantFiled: May 11, 2011Date of Patent: March 22, 2016Assignees: Dublin City University, Amic ABInventors: Jim Writser Peter Bakker, Ove Ohman, Dirk Kurzbuch, Thomas Ruckstuhl, Brian MacCraith, Stephen O'Driscoll
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Publication number: 20130236982Abstract: A sensor comprising a substrate (100) having a first surface (105) and a second surface (110) is described. The first surface has at least one sensor site (115) provided thereon. The substrate is configured such that on excitation of a sample provided at the sensor site, luminescence originating from the sensor site propagates into the substrate, the second surface of the substrate being configured to selectively transmit the luminescence propagating within the substrates at angles greater than the critical angle out of the substrate where it may be detected by a detector (160) provided below the substrate.Type: ApplicationFiled: May 11, 2011Publication date: September 12, 2013Applicants: AMIC AB, DUBLIN CITY UNIVERSITYInventors: Jim Writser Peter Bakker, Ove Ohman, Dirk Kurzbuch, Thomas Ruckstuhl, Brian MacCraith, Stephen O'Driscoll
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Patent number: 8228602Abstract: A scanning system that provides for detection based on supercritical angle fluorescence (SAF) is described. The system provides for the optical coupling of a sample to the scanner in a sandwich structure that uses first and second refractive index matching materials to provide optical coupling through the sandwich arrangement.Type: GrantFiled: March 25, 2010Date of Patent: July 24, 2012Assignee: Dublin City University of Collins AvenueInventors: Dirk Kurzbuch, Jim Writser Peter Bakker, Thomas Ruckstuhl, Jonas Melin
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Publication number: 20100243914Abstract: A scanning system that provides for detection based on supercritical angle fluorescence (SAF) is described. The system provides for the optical coupling of a sample to the scanner in a sandwich structure that uses first and second refractive index matching materials to provide optical coupling through the sandwich arrangement.Type: ApplicationFiled: March 25, 2010Publication date: September 30, 2010Inventors: Dirk Kurzbuch, Jim Writser Peter Bakker, Thomas Ruckstuhl, Jonas Melin
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Publication number: 20100194915Abstract: In a method suitable for processing colour values provided by a camera sensor comprising pixels of different colours, values of a first colour at positions of pixels of a second and a third colour are interpolated (102) based on an averaging using at least one control value.Type: ApplicationFiled: January 9, 2008Publication date: August 5, 2010Inventors: Peter Bakker, Johan Schirris
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Publication number: 20100056916Abstract: A system is provided that may be used for locating and diagnosing lesions in the human body in vivo. In some embodiments, once the exact position of a lesion is found, a biopsy may be taken from the lesion using e.g. ultra sound techniques for guidance of the biopsy needle. Use of the system drastically reduces the negative biopsy samples compared to currently used “blind sampling” techniques. This reduces patient discomfort and minimizes infections as the number of biopsy samples is reduced. A method and computer-readable medium is also provided.Type: ApplicationFiled: November 16, 2007Publication date: March 4, 2010Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.Inventors: Levinus Peter Bakker, Michael Cornelis Van Beek, Martinus Bernardus Van Der Mark, Rene Van Den Ham, Bernardus Hendrikus Wilhelmus Hendriks, Ralf Hoffmann, Nijs Cornelis Van Der Vaart, Marjolein Van Der Voort
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Patent number: 6940336Abstract: Voltage regulator with an output transistor MP1, including a first PMOS FET, whereby the input voltage Vdd of the voltage regulator is applied to the source of the output transistor MP1 and where the drain of the output transistor MP1 constitutes the output of the voltage regulator. The voltage regulator, furthermore, includes a regulation circuit 1 that may, for example, consist of an error amplifier and that controls the output transistor in such a way that the least possible deviations between the output voltage Vout and the target output voltage are allowed to occur.Type: GrantFiled: October 28, 2003Date of Patent: September 6, 2005Assignee: Texas Instruments IncorporatedInventor: Peter Bakker
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Publication number: 20040135623Abstract: Voltage regulator with an output transistor MP1, including a first PMOS FET, whereby the input voltage Vdd of the voltage regulator is applied to the source of the output transistor MP1 and where the drain of the output transistor MP1 constitutes the output of the voltage regulator. The voltage regulator, furthermore, includes a regulation circuit 1 that may, for example, consist of an error amplifier and that controls the output transistor in such a way that the least possible deviations between the output voltage Vout and the target output voltage are allowed to occur.Type: ApplicationFiled: October 28, 2003Publication date: July 15, 2004Inventor: Peter Bakker
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Patent number: 6501308Abstract: The circuit configuration for the generation of clock signals for a semiconductor memory (14) that are edge-synchronous with the output signals of a clock generator (16) comprises an input stage (20) to which the output signals of the clock generator (16) are applied. It furthermore contains a phase detector (30) which receives the signals output by the input stage (20) and whose output signals control a voltage-controlled oscillator (34) which supplies the clock signals for the semiconductor memory (14). It also contains a conversion stage (42) which applies signals related to the output signals of the oscillator (34) to the phase detector (30), which controls the oscillator in such a way that the phase difference between the signals reaching it from the input stage (20) and the signals also reaching it from the conversion stage (42) becomes zero. The input stage (20) comprises an amplifier (44) containing a circuit component (62) capable of influencing the signal transit time.Type: GrantFiled: October 5, 2001Date of Patent: December 31, 2002Assignee: Texas Instruments Deutschland, GmbHInventors: Peter Bakker, Fred S. Rennig
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Publication number: 20020067194Abstract: The circuit configuration for the generation of clock signals for a semiconductor memory (14) that are edge-synchronous with the output signals of a clock generator (16) comprises an input stage (20) to which the output signals of the clock generator (16) are applied. It furthermore contains a phase detector (30) which receives the signals output by the input stage (20) and whose output signals control a voltage-controlled oscillator (34) which supplies the clock signals for the semiconductor memory (14). It also contains a conversion stage (42) which applies signals related to the output signals of the oscillator (34) to the phase detector (30), which controls the oscillator in such a way that the phase difference between the signals reaching it from the input stage (20) and the signals also reaching it from the conversion stage (42) becomes zero. The input stage (20) comprises an amplifier (44) containing a circuit component (62) capable of influencing the signal transit time.Type: ApplicationFiled: October 5, 2001Publication date: June 6, 2002Inventors: Peter Bakker, Fred S. Rennig
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Patent number: 4570528Abstract: In a carillon or chimes keyboard, which may be a manual or a pedal set, the eys (sticks or pedals) and the frame for taking them up pivotally are provided with cooperating surfaces, one surface on the key hitting the other surface on the frame at the end of the upward release movement of the key after it has been depressed for operating a bell.For dampening the clattering noise caused by this hitting, the invention provides for such cooperating surfaces on the keys and the frame, which are inclined, preferably at about 30.degree., to the upward direction of movement of the keys just before they hit on the frame during this release movement.Type: GrantFiled: June 15, 1983Date of Patent: February 18, 1986Assignee: Koninklijke Eijsbouts Klokkengieterij En Fabriek Van Torenuurwerken B.V.Inventor: Peter Bakker