Patents by Inventor Peter Benyon

Peter Benyon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040039472
    Abstract: In accordance with the objectives of the invention a new methodology is provided that assures that integrated process results are verified and assured prior to the installation of processing tools as part of modifying or updating of a semiconductor manufacturing foundry. The complete semiconductor manufacturing complement of processing tools is sub-divided into short-loops or sub-modules, which are then combined into a full loop. This combination of sub-modules into modules that closer approach a full complement of processing tools can be accomplished in a gradual manner, whereby one or more sub-loops are first combined and evaluated, to this combination one or more additional sub-groups may be added whereby each of these latter sub-groups may also have been created by combining one or more (original) sub-loops. This process is continued to the point where a full complement of process equipment has been created, completing the full processing loops of the semiconductor manufacturing facility.
    Type: Application
    Filed: August 22, 2002
    Publication date: February 26, 2004
    Applicant: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Cheng Chor Shu, Cho Nam Hoon, Leong Chee Kong, Peter Benyon, Johnny Cham, George Wong, Neoh Soon Ee