Patents by Inventor Peter Brandl

Peter Brandl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10957686
    Abstract: A semiconductor device of an embodiment includes a transistor device in a semiconductor die including a semiconductor body. The transistor device includes transistor cells connected in parallel and covering at least 80% of an overall active area at a first surface of the semiconductor body. The semiconductor device further includes a control terminal contact area at the first surface electrically connected to a control electrode of each of the transistor cells. A first load terminal contact area at the first surface electrically connected to a first load terminal region of each of the transistor cells. The semiconductor device further includes a resistor in the semiconductor die and electrically coupled between the control terminal contact area and the first load terminal contact area, and a pn junction diode electrically connected in series with the resistor. A method of producing the semiconductor device is also described.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: March 23, 2021
    Assignee: Infineon Technologies AG
    Inventors: Dirk Ahlers, Markus Zundel, Peter Brandl, Kurt Matoy, Thomas Ostermann
  • Publication number: 20200152621
    Abstract: A semiconductor device of an embodiment includes a transistor device in a semiconductor die including a semiconductor body. The transistor device includes transistor cells connected in parallel and covering at least 80% of an overall active area at a first surface of the semiconductor body. The semiconductor device further includes a control terminal contact area at the first surface electrically connected to a control electrode of each of the transistor cells. A first load terminal contact area at the first surface electrically connected to a first load terminal region of each of the transistor cells. The semiconductor device further includes a resistor in the semiconductor die and electrically coupled between the control terminal contact area and the first load terminal contact area, and a pn junction diode electrically connected in series with the resistor.
    Type: Application
    Filed: January 16, 2020
    Publication date: May 14, 2020
    Inventors: Dirk Ahlers, Markus Zundel, Peter Brandl, Kurt Matoy, Thomas Ostermann
  • Patent number: 10593799
    Abstract: A semiconductor component includes a field-effect transistor arrangement having a drift zone and body region between the drift zone and a first surface of a semiconductor body. Trench structures of a first type extend from the first surface into the semiconductor body and have a maximum lateral dimension at the first surface which is less than a depth of first and second ones of the trench structures. A net doping concentration at a reference depth at a first location in the drift zone is at least 10% greater than at a second location in the drift zone at the reference depth, which is located between the body region and a bottom of the first trench structure. The first location is at the same first lateral distance from the first and second trench structures. The second location is at the same second lateral distance from the first and second trench structures.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: March 17, 2020
    Assignee: Infineon Technologies AG
    Inventors: Markus Zundel, Karl-Heinz Bach, Peter Brandl, Andrew Christopher Graeme Wood
  • Patent number: 10586792
    Abstract: A semiconductor device of an embodiment includes a transistor device in a semiconductor die including a semiconductor body. The transistor device includes transistor cells connected in parallel and covering at least 80% of an overall active area at a first surface of the semiconductor body. The semiconductor device further includes a control terminal contact area at the first surface electrically connected to a control electrode of each of the transistor cells. A first load terminal contact area at the first surface electrically connected to a first load terminal region of each of the transistor cells. The semiconductor device further includes a resistor in the semiconductor die and electrically coupled between the control terminal contact area and the first load terminal contact area.
    Type: Grant
    Filed: December 31, 2018
    Date of Patent: March 10, 2020
    Assignee: Infineon Technologies AG
    Inventors: Dirk Ahlers, Markus Zundel, Peter Brandl, Kurt Matoy, Thomas Ostermann
  • Publication number: 20190334000
    Abstract: A transistor component includes at least one transistor cell having: a drift region, a source region, a body region and a drain region in a semiconductor body, the body region being arranged between the source and drift regions, and the drift region being arranged between the body and drain regions; a gate electrode arranged adjacent to the body region and dielectrically isolated from the body region by a gate dielectric; and a field electrode arranged adjacent to the drift region and dielectrically isolated from the drift region by a field electrode dielectric. The field electrode dielectric has a thickness that increases in a direction toward the drain region. The drift region has, in a mesa region adjacent to the field electrode, a doping concentration that increases in the direction toward the drain region.
    Type: Application
    Filed: April 24, 2019
    Publication date: October 31, 2019
    Inventors: Markus Zundel, Karl-Heinz Bach, Peter Brandl, Franz Hirler, Andrew Christopher Graeme Wood
  • Patent number: 10338778
    Abstract: A collaboration system provides enhanced user interface to enable users to interact with electronic devices. In one embodiment, users can add content to a digital system by using a pen that streams coordinates so that input to the digital system may be based on conventional pen and paper handwriting. In another embodiment, a pie-based menu system is used for input to large display area digital devices in which an occluded portion of the pie-based menu system is not used for direct input by the user. The selection of which areas of the pie-based menu system should be omitted from use is adaptive and responsive to whether the user is left-handed or right-handed, and the wrist angle defined by the user's posture. In still another embodiment, an ergonomic open-shaped pie menu system is provided to facilitate selection of options on a digital surface.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: July 2, 2019
    Assignee: APPLE INC.
    Inventors: Bernard Doray, Paul To, Michael Haller, Peter Brandl, Thomas J. Seifried
  • Publication number: 20190157259
    Abstract: A semiconductor device of an embodiment includes a transistor device in a semiconductor die including a semiconductor body. The transistor device includes transistor cells connected in parallel and covering at least 80% of an overall active area at a first surface of the semiconductor body. The semiconductor device further includes a control terminal contact area at the first surface electrically connected to a control electrode of each of the transistor cells. A first load terminal contact area at the first surface electrically connected to a first load terminal region of each of the transistor cells. The semiconductor device further includes a resistor in the semiconductor die and electrically coupled between the control terminal contact area and the first load terminal contact area.
    Type: Application
    Filed: December 31, 2018
    Publication date: May 23, 2019
    Inventors: Dirk Ahlers, Markus Zundel, Peter Brandl, Kurt Matoy, Thomas Ostermann
  • Publication number: 20190051749
    Abstract: A semiconductor component includes a field-effect transistor arrangement having a drift zone and body region between the drift zone and a first surface of a semiconductor body. Trench structures of a first type extend from the first surface into the semiconductor body and have a maximum lateral dimension at the first surface which is less than a depth of first and second ones of the trench structures. A net doping concentration at a reference depth at a first location in the drift zone is at least 10% greater than at a second location in the drift zone at the reference depth, which is located between the body region and a bottom of the first trench structure. The first location is at the same first lateral distance from the first and second trench structures. The second location is at the same second lateral distance from the first and second trench structures.
    Type: Application
    Filed: August 10, 2018
    Publication date: February 14, 2019
    Inventors: Markus Zundel, Karl-Heinz Bach, Peter Brandl, Andrew Christopher Graeme Wood
  • Patent number: 10186508
    Abstract: A semiconductor device of an embodiment includes a transistor device in a semiconductor die including a semiconductor body. The transistor device includes transistor cells connected in parallel and covering at least 80% of an overall active area at a first surface of the semiconductor body. The semiconductor device further includes a control terminal contact area at the first surface electrically connected to a control electrode of each of the transistor cells. A first load terminal contact area at the first surface electrically connected to a first load terminal region of each of the transistor cells. The semiconductor device further includes a resistor in the semiconductor die and electrically coupled between the control terminal contact area and the first load terminal contact area.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: January 22, 2019
    Assignee: Infineon Technologies AG
    Inventors: Dirk Ahlers, Markus Zundel, Peter Brandl, Kurt Matoy, Thomas Ostermann
  • Patent number: 10115817
    Abstract: A method of manufacturing a semiconductor device includes forming a first semiconductor layer on a semiconductor substrate of a first conductivity type having a continuous first area and a second area, introducing dopants of the first conductivity type in the continuous first area of the first semiconductor layer, forming a second semiconductor layer on the first semiconductor layer, and forming trenches in the second semiconductor layer in the continuous first area.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: October 30, 2018
    Assignee: Infineon Technologies AG
    Inventors: Markus Zundel, Peter Brandl
  • Publication number: 20180114788
    Abstract: A semiconductor device of an embodiment includes a transistor device in a semiconductor die including a semiconductor body. The transistor device includes transistor cells connected in parallel and covering at least 80% of an overall active area at a first surface of the semiconductor body. The semiconductor device further includes a control terminal contact area at the first surface electrically connected to a control electrode of each of the transistor cells. A first load terminal contact area at the first surface electrically connected to a first load terminal region of each of the transistor cells. The semiconductor device further includes a resistor in the semiconductor die and electrically coupled between the control terminal contact area and the first load terminal contact area.
    Type: Application
    Filed: October 24, 2017
    Publication date: April 26, 2018
    Inventors: Dirk Ahlers, Markus Zundel, Peter Brandl, Kurt Matoy, Thomas Ostermann
  • Publication number: 20170097746
    Abstract: A collaboration system provides enhanced user interface to enable users to interact with electronic devices. In one embodiment, users can add content to a digital system by using a pen that streams coordinates so that input to the digital system may be based on conventional pen and paper handwriting. In another embodiment, a pie-based menu system is used for input to large display area digital devices in which an occluded portion of the pie-based menu system is not used for direct input by the user. The selection of which areas of the pie-based menu system should be omitted from use is adaptive and responsive to whether the user is left-handed or right-handed, and the wrist angle defined by the user's posture. In still another embodiment, an ergonomic open-shaped pie menu system is provided to facilitate selection of options on a digital surface.
    Type: Application
    Filed: December 14, 2016
    Publication date: April 6, 2017
    Inventors: Bernard Doray, Paul To, Michael Haller, Peter Brandl, Thomas J. Seifried
  • Publication number: 20160268422
    Abstract: A method of manufacturing a semiconductor device includes forming a first semiconductor layer on a semiconductor substrate of a first conductivity type having a continuous first area and a second area, introducing dopants of the first conductivity type in the continuous first area of the first semiconductor layer, forming a second semiconductor layer on the first semiconductor layer, and forming trenches in the second semiconductor layer in the continuous first area.
    Type: Application
    Filed: May 18, 2016
    Publication date: September 15, 2016
    Inventors: Markus Zundel, Peter Brandl
  • Patent number: 9412827
    Abstract: A vertical semiconductor device includes a semiconductor body having a backside and extending, in a peripheral area and in a vertical direction substantially perpendicular to the backside, from the backside to a first surface of the semiconductor body, the body including in an active area spaced apart semiconductor mesas extending, in the vertical direction, from the first surface to a main surface arranged above the first surface, in a vertical cross-section the peripheral area extending between the active area and an edge that extends between the back-side and the first surface, in the vertical cross-section each of the mesas including first and second side walls, a first pn-junction extending between the first and second side walls, and a conductive region in Ohmic contact with the mesa and extending from the main surface into the mesa. Gate electrodes are arranged between adjacent mesas and extend across the first pn-junctions.
    Type: Grant
    Filed: October 9, 2015
    Date of Patent: August 9, 2016
    Assignee: Infineon Technologies AG
    Inventors: Peter Brandl, Matthias Herman Peri
  • Publication number: 20160162052
    Abstract: A collaboration system provides enhanced user interface to enable users to interact with electronic devices. In one embodiment, users can add content to a digital system by using a pen that streams coordinates so that input to the digital system may be based on conventional pen and paper handwriting. In another embodiment, a pie-based menu system is used for input to large display area digital devices in which an occluded portion of the pie-based menu system is not used for direct input by the user. The selection of which areas of the pie-based menu system should be omitted from use is adaptive and responsive to whether the user is left-handed or right-handed, and the wrist angle defined by the user's posture. In still another embodiment, an ergonomic open-shaped pie menu system is provided to facilitate selection of options on a digital surface.
    Type: Application
    Filed: December 7, 2015
    Publication date: June 9, 2016
    Inventors: Bernard Doray, Paul To, Michael Haller, Peter Brandl, Thomas J. Seifried
  • Patent number: 9349854
    Abstract: A semiconductor device includes a vertical IGFET in a first area of a semiconductor body, the vertical IGFET having a drift zone between a body zone and a drain electrode, the drift zone having a vertical dopant profile of a first conductivity type being a superposition of a first dopant profile declining with increasing distance from the drain electrode and dominating the vertical dopant profile in a first zone next to the drain electrode and a second dopant profile being a broadened peak dopant profile and dominating the vertical dopant profile in a second zone next to the body zone.
    Type: Grant
    Filed: October 4, 2013
    Date of Patent: May 24, 2016
    Assignee: Infineon Technologies AG
    Inventors: Markus Zundel, Peter Brandl
  • Patent number: 9268413
    Abstract: The present invention relates to a multi-touch display system that supports both multi-touch human input as well as input from a digital pen. The display system has a display panel that is configured to allow human touches along a front surface to be detected and tracked. The display panel also includes a location pattern that preferably covers the viewable areas of the display panel. The location pattern is configured to allow any location within the location pattern to be detected by analyzing a portion of the display pattern that is associated with the particular location. The digital pen is used to “write” on the display panel, wherein such a writing function involves detecting the location where writing occurs and controlling display content that is displayed on the display panel to reflect what is being written.
    Type: Grant
    Filed: July 7, 2008
    Date of Patent: February 23, 2016
    Assignee: RPX CLEARINGHOUSE LLC
    Inventors: Bernard Doray, Paul To, Michael Haller, James Robert Powell, Peter Brandl, Jakob Leitner, Thomas Josef Seifried, Moses Tao-Ling Ma
  • Publication number: 20160035845
    Abstract: A vertical semiconductor device includes a semiconductor body having a backside and extending, in a peripheral area and in a vertical direction substantially perpendicular to the backside, from the backside to a first surface of the semiconductor body, the body including in an active area spaced apart semiconductor mesas extending, in the vertical direction, from the first surface to a main surface arranged above the first surface, in a vertical cross-section the peripheral area extending between the active area and an edge that extends between the back-side and the first surface, in the vertical cross-section each of the mesas including first and second side walls, a first pn-junction extending between the first and second side walls, and a conductive region in Ohmic contact with the mesa and extending from the main surface into the mesa. Gate electrodes are arranged between adjacent mesas and extend across the first pn-junctions.
    Type: Application
    Filed: October 9, 2015
    Publication date: February 4, 2016
    Inventors: Peter Brandl, Matthias Herman Peri
  • Patent number: 9207833
    Abstract: A collaboration system provides enhanced user interface to enable users to interact with electronic devices. In one embodiment, users can add content to a digital system by using a pen that streams coordinates so that input to the digital system may be based on conventional pen and paper handwriting. In another embodiment, a pie-based menu system is used for input to large display area digital devices in which an occluded portion of the pie-based menu system is not used for direct input by the user. The selection of which areas of the pie-based menu system should be omitted from use is adaptive and responsive to whether the user is left-handed or right-handed, and the wrist angle defined by the user's posture. In still another embodiment, an ergonomic open-shaped pie menu system is provided to facilitate selection of options on a digital surface.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: December 8, 2015
    Assignee: APPLE INC.
    Inventors: Bernard Doray, Paul To, Michael Haller, Peter Brandl, Thomas J. Seifried
  • Patent number: 9184281
    Abstract: Producing a vertical semiconductor device includes: providing a semiconductor wafer including a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type forming a first pn-junction with the first layer, and a third semiconductor layer of the first conductivity type forming a second pn-junction with the second layer and extending to a main surface of the wafer; forming a hard mask on the main surface that includes hard mask portions spaced apart from each other by first openings; using the hard mask to etch deep trenches from the main surface into the first layer so that mesa regions covered at the main surface by respective hard mask portions are formed between adjacent trenches; filling the trenches and first openings of the hard mask; and etching the hard mask to form second openings in the hard mask at the main surface of the mesas.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: November 10, 2015
    Assignee: Infineon Technologies AG
    Inventors: Peter Brandl, Matthias Hermann Peri