Abstract: Some aspects of this disclosure are directed to an automated method to check electrostatic discharge (ESD) effect on a victim device. For example, some aspects of this disclosure relate to a method, including determining a probe point, in a circuit design, for determining effective resistance between the probe point and ground, where the probe point is on an ESD path of in the circuit design. The method includes determining voltage between the probe point and the ground. The method further includes comparing, by a processing device, a resistance value of the ESD path determined based a predefined electric current value at a source point and the measured voltage with a target resistance value range. The method further includes reporting a violation upon determining that the determined resistance value of the ESD path is outside the target resistance value range.

Abstract: Some aspects of this disclosure are directed to an automated method to check electrostatic discharge (ESD) effect on a victim device. For example, some aspects of this disclosure relate to a method, including determining a probe point, in a circuit design, for determining effective resistance between the probe point and ground, where the probe point is on an ESD path of in the circuit design. The method includes determining voltage between the probe point and the ground. The method further includes comparing, by a processing device, a resistance value of the ESD path determined based a predefined electric current value at a source point and the measured voltage with a target resistance value range. The method further includes reporting a violation upon determining that the determined resistance value of the ESD path is outside the target resistance value range.

Abstract: An electrostatic discharge (ESD) device implemented within a power domain to mitigate ESD events imparted from another power domain for reducing integrated circuit (IC) failures. A first power domain includes an interface where ESD events are received and an output that can impart ESD event voltages on other components. A second power domain includes an ESD device coupled to the output of the first power domain and a protected IC. In one embodiment, the ESD device includes a floating device with an input terminal coupled to the interface output. By floating the device receiving the ESD event in the second power domain, damaging ESD induced voltages are reduced. Embodiments of the ESD device can be implemented using standard cell libraries to simplify integration.

Abstract: An electrostatic discharge (ESD) device is implemented within a power domain to mitigate imparting ESD induced voltages on other power domains for reducing integrated circuit (IC) failures. A first power domain includes an interface with a first terminal where an ESD event is received. The interface includes a second terminal coupled to a component within a second power domain. The ESD device is disposed between the first terminal and second terminal to intercept the ESD event. In one embodiment, the ESD device includes a blocking device. The blocking device operatively decouples the first terminal and second terminal in response to a trigger signal received during an ESD event. By operatively decoupling the terminals, transmission of the ESD induced voltages is substantially mitigated. Embodiments of the ESD device can be implemented using standard cell libraries to simplify integration.

Abstract: An electrostatic discharge (ESD) device is implemented within a power domain to mitigate imparting ESD induced voltages on other power domains for reducing integrated circuit (IC) failures. A first power domain includes an interface with a first terminal where an ESD event is received. The interface includes a second terminal coupled to a component within a second power domain. The ESD device is disposed between the first terminal and second terminal to intercept the ESD event. In one embodiment, the ESD device includes a blocking device. The blocking device operatively decouples the first terminal and second terminal in response to a trigger signal received during an ESD event. By operatively decoupling the terminals, transmission of the ESD induced voltages is substantially mitigated. Embodiments of the ESD device can be implemented using standard cell libraries to simplify integration.

Abstract: An electrostatic discharge (ESD) device implemented within a power domain to mitigate ESD events imparted from another power domain for reducing integrated circuit (IC) failures. A first power domain includes an interface where ESD events are received and an output that can impart ESD event voltages on other components. A second power domain includes an ESD device coupled to the output of the first power domain and a protected IC. In one embodiment, the ESD device includes a floating device with an input terminal coupled to the interface output. By floating the device receiving the ESD event in the second power domain, damaging ESD induced voltages are reduced. Embodiments of the ESD device can be implemented using standard cell libraries to simplify integration.

Abstract: In an example embodiment, there is a test module for testing the susceptibility of an integrated circuit design to latch-up. The test module comprises a plurality of test blocks, connected in parallel. Each test block includes an injector block for applying a stress current of voltage to the respective test block and a plurality of sensor blocks located at successively increasing distances from the respective injector block. Each sensor block includes a PNPN latch-up test structure. The present invention combines the respective advantages of IC stress current testing and latch-up parameter measurement using a standard PNPN latch-up test structure.

Abstract: A connector for flat cables 10 comprises basically an insulating housing 20 and contacts 30. The housing 20 has a slot 26 for the insertion of the flat cable 50 and a number of passages 25 for insertion of contacts in communication with the above mentioned slot. The contacts 30 are preferably stamped from a sheet metal material in the form of a V-shape with one end having a soldering tab 38 and the other end having an actuator 36. The actuators 36 are operated by a special bar, thus allowing to insert or to remove the flat cable 50 using very little effort.

Abstract: A receptacle and mating header that can be blindly mated from an initially misaligned condition. The header is rigidly mounted while the receptacle is mounted such that the receptacle can move vertically or laterally in a plane transverse to the axial alignment of pins or sockets therein. The receptacle and mating header have complimentary guide means and lead-in surfaces that engage as mating is attempted and urge the header and receptacle to align for mating.