Patents by Inventor Peter Cottrell

Peter Cottrell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10383552
    Abstract: This disclosure describes, according to some implementations, a system and method for capturing sensor data for gait analysis of a subject using a robot. In an example method, a robot unit receives an instruction to monitor a gait of a subject; initializes a monitoring approach in response to receiving the instructions to begin monitoring the gait of the subject; collecting sensor data capturing movement of the subject along the pathway portion; and generating gait data for gait analysis based on the sensor data. In various embodiments, the monitoring approaches may include an active approach, a passive approach, or a hybrid approach.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: August 20, 2019
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Eric Martinson, Peter Cottrell
  • Publication number: 20170303825
    Abstract: This disclosure describes, according to some implementations, a system and method for capturing sensor data for gait analysis of a subject using a robot. In an example method, a robot unit receives an instruction to monitor a gait of a subject; initializes a monitoring approach in response to receiving the instructions to begin monitoring the gait of the subject; collecting sensor data capturing movement of the subject along the pathway portion; and generating gait data for gait analysis based on the sensor data. In various embodiments, the monitoring approaches may include an active approach, a passive approach, or a hybrid approach.
    Type: Application
    Filed: April 26, 2016
    Publication date: October 26, 2017
    Inventors: Eric Martinson, Peter Cottrell
  • Publication number: 20050085028
    Abstract: A method and structure for protection against latch-up is provided. Integrated circuits manufactured in accordance with the present disclosure feature well and substrate contacts of varying periodicity. Such a strategy enables maximizing the design of an integrated circuit as to the suppression of latch-up while concurrently optimizing available area on the chip allocable to circuit design. This method and structure is particularly beneficial to protect against cable discharge events and other discharge occurrences prone to injecting large current densities into an integrated circuit.
    Type: Application
    Filed: October 21, 2003
    Publication date: April 21, 2005
    Applicant: International Business Machines Corporation
    Inventors: Kiran Chatty, Peter Cottrell, Robert Gauthier, Mujahid Muhammad
  • Publication number: 20050001171
    Abstract: A radiation detector formed using silicon-on-insulator technology. The radiation detector includes a silicon layer formed on an insulating substrate, wherein the silicon layer includes a PNPN structure, and a gate layer formed over the PNPN structure, wherein the gate layer includes a PN gate. Latch-up occurs in the radiation detector only in response to incident radiation.
    Type: Application
    Filed: July 1, 2003
    Publication date: January 6, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Peter Cottrell, Robert Dennard, Edward Nowak, Norman Rohrer