Abstract: Structures for an integrated circuit having a watermark and related methods. The structure comprises a first semiconductor structure including at least one feature with a variation relative to a second semiconductor structure including the at least one feature without the variation. The variation provides a watermark for identifying a Process Design Kit used to form the first semiconductor structure.

Abstract: Structures for an integrated circuit having a watermark and related methods. The structure comprises a first semiconductor structure including at least one feature with a variation relative to a second semiconductor structure including the at least one feature without the variation. The variation provides a watermark for identifying a Process Design Kit used to form the first semiconductor structure.

Abstract: A method of determining electron tunneling values at various locations in a capacitor structure having a first and a second conductive plate with a dielectric material disposed there between, wherein each plate has first and second ends, comprising the steps of; determining the nominal tunneling voltage of the dielectric material at its thickness to provide a target voltage. Applying a first voltage level equally across the first plate. Applying a second voltage level to the first end of the second plate which together with the voltage applied to the first plate establishes a positive offset voltage with respect to the target voltage. Applying incrementally changing voltage levels to the second end of the second plate, which varying voltage levels change the voltage at the second end of said second plate of each set to vary the length of the capacitive structure above the target voltage.