Patents by Inventor Peter D. Moran

Peter D. Moran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030089950
    Abstract: Silicon and silicon-germanium semiconductor-on-insulator structures are formed with strong bonds between the silicon or silicon-germanium layer and the underlying insulating substrate with low defects in the semiconductor and minimal flaws in the bonding between the semiconductor layer and the substrate. An oxide layer is initially formed on the semiconductor wafer, and the wafer may then be annealed, if necessary, to drive off water from the oxide layer so that the oxide layer is well below the water saturation of the oxide. The surfaces of the oxide layer and the substrate are then cleaned and placed into contact at relatively low temperatures to effect a strong bond. The semiconductor layer may then be thinned by mechanical or chemical processes, or both, and the completed structure annealed to perfect the bond between the semiconductor layer and the substrate.
    Type: Application
    Filed: November 15, 2001
    Publication date: May 15, 2003
    Inventors: Thomas F. Kuech, Peter D. Moran