Patents by Inventor Peter D. Muellers
Peter D. Muellers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180189547Abstract: Technology for a biometric identification system is described. The biometric identification system can include an infrared (IR) illumination device, a thermal imager, and a controller. The controller can determine, using a defined thermal profile, when a thermal image captured by the thermal imager includes a face of a user. The controller can determine, based on the thermal image, when the face of the user is located within a selected range of distances from the thermal imager. The controller can instruct the IR illumination device to illuminate for a selected period of time when the face of the user is located within the selected range of distances from the thermal imager.Type: ApplicationFiled: December 30, 2016Publication date: July 5, 2018Applicant: Intel CorporationInventors: Melanie Daniels, Laura L. Warner, Peter D. Mueller
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Patent number: 9703515Abstract: A graphical user interface for a concurrent computing environment that presents the output generated by multiple concurrent computing units during and upon completion of their portions of a concurrent computing computation is discussed. The output from each concurrent computing unit may be directed to a single display where it is portioned into different regions of the display. The output from all of the concurrent computing units or a subset of the concurrent computing units may be shown in different arrangements. Blocks or lines of output from different concurrent computing units may appear in order of arrival at the display, or if precise timing references are available, in order of generation by the concurrent computing units. In either case the relative ordering of the outputs may be used to interpret the progress, performance and results of a concurrent computing computation.Type: GrantFiled: November 8, 2006Date of Patent: July 11, 2017Assignee: The MathWorks, Inc.Inventor: Peter D. Muellers
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Patent number: 9405564Abstract: A graphical user interface for a concurrent computing environment that conveys the concurrent nature of a computing environment and allows a user to monitor the status of a concurrent process being executed on multiple concurrent computing units is discussed. The graphical user interface allows the user to target specific concurrent computer units to receive commands. The graphical user interface also alters the command prompt to reflect the currently targeted concurrent computing units.Type: GrantFiled: July 31, 2006Date of Patent: August 2, 2016Assignee: The MathWorks, Inc.Inventors: Peter D. Muellers, Audrey Benevento, Kristin Thomas
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Patent number: 9262375Abstract: Manageability ports for inter-processor communication links, along with associated systems and methods, are generally provided.Type: GrantFiled: November 27, 2013Date of Patent: February 16, 2016Assignee: Marvell International Ltd.Inventor: Peter D. Mueller
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Patent number: 9069517Abstract: A graphical user interface for an interactive concurrent computing environment is discussed. The graphical interface conveys the concurrent nature of the computing environment and allows a user to monitor the status of the concurrent process being executed. The graphical interface may indicate the status of the process, the status of the various computing units of the process, or the status of groups of computing units. This allows the user to monitor the concurrent process as the process is executing including whether or not computing units of the concurrent process are idle, busy or stopped.Type: GrantFiled: November 13, 2013Date of Patent: June 30, 2015Assignee: The MathWorks, Inc.Inventors: Peter D. Muellers, Audrey Benevento, Kristin Thomas
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Patent number: 8601145Abstract: Manageability ports for inter-processor communication links, along with associated systems and methods, are generally provided.Type: GrantFiled: June 8, 2010Date of Patent: December 3, 2013Assignee: Marvell International Ltd.Inventor: Peter D. Mueller
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Patent number: 8335229Abstract: In some embodiments, a method for supporting multiple devices on a high speed physical link may be described. An embedded device may assert a link request pin to request to transmit data on a multi-point communications link that may serve a plurality of embedded devices. A controlling device may receive the link request signal. When the controlling device finishes sending data on the link, it may address the plurality of embedded devices in a round robin format and may determine which device asserted the link request pin. The embedded device that asserted the link request pin may send an acknowledgement signal to the controlling device when it is addressed.Type: GrantFiled: February 4, 2010Date of Patent: December 18, 2012Assignee: Marvell International Ltd.Inventors: Peter D. Mueller, Mark N. Fullerton, Nir Nossenson
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Publication number: 20100250821Abstract: Manageability ports for inter-processor communication links, along with associated systems and methods, are generally provided.Type: ApplicationFiled: June 8, 2010Publication date: September 30, 2010Applicant: Marvell International, Ltd.Inventor: Peter D. MUELLER
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Patent number: 7792505Abstract: A method of adjusting a power amplifier may include producing a power measure of an output signal of the power amplifier and estimating an estimated transmission error of the output signal from the power measure. The estimated transmission error may be compared with a maximum error that is associated with a data rate of the output signal. A bias voltage that is input to the power amplifier may be decreased if the comparing determines that the estimated transmission error is less than the maximum error.Type: GrantFiled: January 29, 2007Date of Patent: September 7, 2010Assignee: Intel CorporationInventors: Peter D Mueller, Melanie Daniels
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Patent number: 7787836Abstract: A wireless communication device to transmit and receive signals of two or more wireless networks is disclosed. The wireless communication device includes a first radio to transmit a first type of modulated signals in at least first and second frequency bands and a second radio to transmit a second type of modulated signals in at least third and forth frequency bands. The wireless communication device further includes a first front end module to transmit simultaneously the first and the third frequency bands of the first and second radio through two or more antennas utilizing multiple input multiple (MIMO) output transmission scheme and a second front end module to transmit simultaneously the second and the fourth frequency bands of the first and second radio through two or more antennas utilizing multiple input multiple (MIMO) output transmission scheme.Type: GrantFiled: March 12, 2007Date of Patent: August 31, 2010Assignee: Intel CorporationInventors: Melanie Daniels, Peter D. Mueller
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Patent number: 7734797Abstract: Manageability ports for inter-processor communication links, along with associated systems and methods, are generally provided.Type: GrantFiled: March 29, 2004Date of Patent: June 8, 2010Assignee: Marvell International Ltd.Inventor: Peter D. Mueller
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Patent number: 7668190Abstract: In some embodiments, a method for supporting multiple devices on a high speed physical link may be described. An embedded device may assert a link request pin to request to transmit data on a multi-point communications link that may serve a plurality of embedded devices. A controlling device may receive the link request signal. When the controlling device finishes sending data on the link, it may address the plurality of embedded devices in a round robin format and may determine which device asserted the link request pin. The embedded device that asserted the link request pin may send an acknowledgement signal to the controlling device when it is addressed.Type: GrantFiled: December 31, 2003Date of Patent: February 23, 2010Assignee: Marvell International Ltd.Inventors: Peter D. Mueller, Mark N. Fullerton, Nir Nossenson
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Graphical interface for grouping concurrent computing units executing a concurrent computing process
Patent number: 7631168Abstract: A graphical user interface for an interactive concurrent computing environment that conveys the concurrent nature of the computing environment and allows a user to monitor the status of a concurrent process being executed on multiple concurrent computing units is discussed. The graphical user interface indicates the status of groups of instances of the concurrent computing process including whether the instances of the concurrent process are idle, busy or stopped.Type: GrantFiled: July 31, 2006Date of Patent: December 8, 2009Assignee: The Math Works, Inc.Inventors: Peter D. Muellers, Audrey Benevento, Kristin Thomas -
Patent number: 7594065Abstract: A memory programmer may be coupled through a first processor and a physical interface to a semiconductor memory to be programmed. The interface may be the same interface that allows two separate processors in a multiprocessor memory to communicate with one another in one embodiment. Thus, an independent memory bus coupled directly to the memory components to be programmed may be eliminated, reducing form factor, decreasing costs, and increasing manufacturing throughput in some embodiments of the present invention.Type: GrantFiled: July 14, 2006Date of Patent: September 22, 2009Assignee: Marvell International Ltd.Inventor: Peter D. Mueller
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Patent number: 7555584Abstract: Method and apparatus relating to defining additional channels in an interprocessor communication system having broadcast and non-broadcast channels. A broadcast identifier may be sent on a channel defined to be non-broadcast, generating an additional broadcast channel outside the interprocessor communication protocol definition. Likewise a device-specific identifier may be sent on a channel defined to be a broadcast channel, generating an additional non-broadcast channel outside the interprocessor communication protocol definition.Type: GrantFiled: September 29, 2004Date of Patent: June 30, 2009Assignee: Intel CorporationInventor: Peter D. Mueller
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Publication number: 20080227487Abstract: A wireless communication device to transmit and receive signals of two or more wireless networks is disclosed. The wireless communication device includes a first radio to transmit a first type of modulated signals in at least first and second frequency bands and a second radio to transmit a second type of modulated signals in at least third and forth frequency bands. The wireless communication device further includes a first front end module to transmit simultaneously the first and the third frequency bands of the first and second radio through two or more antennas utilizing multiple input multiple (MIMO) output transmission scheme and a second front end module to transmit simultaneously the second and the fourth frequency bands of the first and second radio through two or more antennas utilizing multiple input multiple (MIMO) output transmission scheme.Type: ApplicationFiled: March 12, 2007Publication date: September 18, 2008Inventors: Melanie Daniels, Peter D. Mueller
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Publication number: 20080182530Abstract: A method of adjusting a power amplifier may include producing a power measure of an output signal of the power amplifier and estimating an estimated transmission error of the output signal from the power measure. The estimated transmission error may be compared with a maximum error that is associated with a data rate of the output signal. A bias voltage that is input to the power amplifier may be decreased if the comparing determines that the estimated transmission error is less than the maximum error.Type: ApplicationFiled: January 29, 2007Publication date: July 31, 2008Inventors: Peter D. Mueller, Melanie Daniels
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Patent number: 7325087Abstract: A memory programmer may be coupled through a first processor and a physical interface to a semiconductor memory to be programmed. The interface may be the same interface that allows two separate processors in a multiprocessor memory to communicate with one another in one embodiment. Thus, an independent memory bus coupled directly to the memory components to be programmed may be eliminated, reducing form factor, decreasing costs, and increasing manufacturing throughput in some embodiments of the present invention.Type: GrantFiled: August 4, 2006Date of Patent: January 29, 2008Assignee: Marvell International Ltd.Inventor: Peter D. Mueller
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Publication number: 20070300048Abstract: A graphical user interface for a concurrent computing environment that conveys the concurrent nature of a computing environment and allows a user to monitor the status of a concurrent process being executed on multiple concurrent computing units is discussed. The graphical user interface allows the user to target specific concurrent computer units to receive commands. The graphical user interface also alters the command prompt to reflect the currently targeted concurrent computing units.Type: ApplicationFiled: July 31, 2006Publication date: December 27, 2007Applicant: The MathWorks, Inc.Inventors: Peter D. Muellers, Audrey Benevento, Kristin Thomas
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Patent number: 7209989Abstract: Method and apparatus relating to an acknowledgement mechanism in an interconnected subsystem architecture. After a data message is transmitted, the transmitting device may transmit an acknowledge message on a channel undefined by the inter-subsystem communication protocol associated with the interconnection architecture. The undefined channel may be generated using a device-specific identifier on a channel defined to be a broadcast channel. The receiving device may acknowledge the transfer by switching a sideband control signal line.Type: GrantFiled: September 29, 2004Date of Patent: April 24, 2007Assignee: Intel CorporationInventor: Peter D. Mueller