Abstract: The present invention relates to a process for fabricating integrated circuit system. More particularly, the process allows for fabrication of highly integrated system-on-a-chip modules through heterogeneous integration of different semiconductor technologies wherein alignment targets on the base semiconductor are used for precise lateral positioning of device structures above.

Abstract: Described is a method for conforming electronics to arbitrary shapes. The method comprises acts of forming a device structure to have a growth substrate, an etch stop layer affixed with the growth substrate, and a micro-electronic array. The micro-electronic array comprises a plurality of components atop the etch stop layer. The micro-electronic array is thereafter embedded into a shrinkable layer. The shrinkable layer is then mounted onto a handle wafer that includes a layer of adhering film with the shrinkable layer being pressed into the layer of adhering film. The growth substrate and the etch stop layer are thereafter removed. The adhering film is then dissolved to demount the micro-electronic array and shrinkable layer. Finally, the shrinkable layer is shrunk to conform the micro-electronic array to a three-dimensional shape, with the growth orientation flipped such that metal interconnects may be made to both the top and bottom of the chip.