Patents by Inventor Peter De Schepper

Peter De Schepper has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210011383
    Abstract: A method is described for stabilizing organometallic coating interfaces through the use of multilayer structures that incorporate an underlayer coating. The underlayer is composed of an organic polymer that has crosslinking and adhesion-promoting functional groups. The underlayer composition may include photoacid generators. Multilayer structures for patterning are described based on organometallic radiation sensitive patterning compositions, such as alkyl tin oxo hydroxo compositions, which are placed over a polymer underlayer.
    Type: Application
    Filed: July 10, 2020
    Publication date: January 14, 2021
    Inventors: Brian J. Cardineau, Shu-Hao Chang, Jason K. Stowers, Michael Kocsis, Peter de Schepper
  • Publication number: 20200124970
    Abstract: A rinse process is described for processing an initially patterned structure formed with an organometallic radiation sensitive material, in which the rinse process can remove portions of the composition remaining after pattern development to make the patterned structure more uniform such that a greater fraction of patterned structures can meet specifications. The radiation sensitive material can comprise alkyl tin oxide hydroxide compositions. The rinsing process can be effectively used to improve patterning of fine structures using extreme ultraviolet light.
    Type: Application
    Filed: October 16, 2019
    Publication date: April 23, 2020
    Inventors: Michael Kocsis, Peter De Schepper, Michael Greer, Shu-Hao Chang
  • Patent number: 10490442
    Abstract: An example embodiment may include a method for blocking one or more portions of one or more trenches during manufacture of a semiconductor structure. The method may include (i) providing a substrate comprising one or more trenches, and a dielectric material under the one or more trenches, (ii) providing a first overlayer on the substrate, thereby filling the one or more trenches, the first overlayer having a planar top surface, a top portion of the first overlayer, comprising the top surface, being etchable selectively with respect to a condensed photo-condensable metal oxide, (iii) covering a first area of the top surface, situated directly above the one or more portions and corresponding thereto, with a block pattern of the condensed photo-condensable metal oxide, thereby leaving a second area of the top surface, having at least another portion of at least one of the trenches thereunder, uncovered.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: November 26, 2019
    Assignee: IMEC VZW
    Inventors: Boon Teik Chan, Ming Mao, Peter De Schepper, Michael Kocsis
  • Publication number: 20180240699
    Abstract: An example embodiment may include a method for blocking one or more portions of one or more trenches during manufacture of a semiconductor structure. The method may include (i) providing a substrate comprising one or more trenches, and a dielectric material under the one or more trenches, (ii) providing a first overlayer on the substrate, thereby filling the one or more trenches, the first overlayer having a planar top surface, a top portion of the first overlayer, comprising the top surface, being etchable selectively with respect to a condensed photo-condensable metal oxide, (iii) covering a first area of the top surface, situated directly above the one or more portions and corresponding thereto, with a block pattern of the condensed photo-condensable metal oxide, thereby leaving a second area of the top surface, having at least another portion of at least one of the trenches thereunder, uncovered.
    Type: Application
    Filed: February 23, 2018
    Publication date: August 23, 2018
    Applicant: IMEC VZW
    Inventors: Boon Teik Chan, Ming Mao, Peter De Schepper, Michael Kocsis
  • Patent number: 9520298
    Abstract: The present disclosure is related to a method for treating a photoresist structure on a substrate, the method comprising producing one or more resist structures on a substrate, introducing the substrate in a plasma reactor, and subjecting the substrate to a plasma treatment at a temperature lower than zero degrees Celsius, such as between zero and ?110° C. The plasma treatment may be a H2 plasma treatment performed in an inductively coupled plasma reactor. The treatment time may be at least 30s.
    Type: Grant
    Filed: February 7, 2015
    Date of Patent: December 13, 2016
    Assignees: IMEC VZW, Katholieke Universiteit Leuven, KU Leuven R&D
    Inventors: Peter De Schepper, Jean-Francois de Marneffe, Efrain Altamirano Sanchez
  • Publication number: 20150228497
    Abstract: The present disclosure is related to a method for treating a photoresist structure on a substrate, the method comprising producing one or more resist structures on a substrate, introducing the substrate in a plasma reactor, and subjecting the substrate to a plasma treatment at a temperature lower than zero degrees Celsius, such as between zero and ?110° C. The plasma treatment may be a H2 plasma treatment performed in an inductively coupled plasma reactor. The treatment time may be at least 30 s.
    Type: Application
    Filed: February 7, 2015
    Publication date: August 13, 2015
    Applicants: Katholieke Universiteit Leuven, KU LEUVEN R&D, IMEC VZW
    Inventors: Peter De Schepper, Jean-Francois de Marneffe, Efrain Altamirano Sanchez