Patents by Inventor Peter DELOS
Peter DELOS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11804804Abstract: One embodiment is a reconfigurable mixer topology for selectively implementing one of a harmonic rejection mixer (HRM) and a subharmonic mixer (SHM), the reconfigurable mixer topology comprising a mixer core comprising a plurality of differential mixers each having a first clock input and a second clock input; a clock generator for generating a plurality of clock signals each having a different phase; and a clock distributor for distributing the plurality of clock signals to the first and second clock inputs of the differential mixers in accordance with a designated operation of the reconfigurable mixer as an HRM or an SHM.Type: GrantFiled: September 14, 2021Date of Patent: October 31, 2023Assignee: Analog Devices, Inc.Inventors: Peter Delos, Ed Balboni
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Patent number: 11764204Abstract: Herein disclosed are systems and circuitry for protecting against overdrive and electrostatic discharge. For example, protection circuitry may include field effect transistors to discharge overdrive outside of an operational voltage range of a circuit in some embodiments to prevent damage to the circuit. Further, the protection circuitry may utilize diode features inherent in the field effect transistors to protect against electrostatic discharge in some embodiments. The circuitry may be implemented in radio frequency sampling analog-to-digital converters and can provide for single-ended signal input and/or output for the analog-to-digital converters.Type: GrantFiled: June 18, 2020Date of Patent: September 19, 2023Assignee: Analog Devices, Inc.Inventors: Ralph D. Moore, Franklin M. Murden, Peter Delos, Srivatsan Parthasarathy, Javier Salcedo, John Guido
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Publication number: 20220085762Abstract: One embodiment is a reconfigurable mixer topology for selectively implementing one of a harmonic rejection mixer (HRM) and a subharmonic mixer (SHM), the reconfigurable mixer topology comprising a mixer core comprising a plurality of differential mixers each having a first clock input and a second clock input; a clock generator for generating a plurality of clock signals each having a different phase; and a clock distributor for distributing the plurality of clock signals to the first and second clock inputs of the differential mixers in accordance with a designated operation of the reconfigurable mixer as an HRM or an SHM.Type: ApplicationFiled: September 14, 2021Publication date: March 17, 2022Applicant: Analog Devices, Inc.Inventors: Peter DELOS, Ed BALBONI
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Publication number: 20210398968Abstract: Herein disclosed are systems and circuitry for protecting against overdrive and electrostatic discharge. For example, protection circuitry may include field effect transistors to discharge overdrive outside of an operational voltage range of a circuit in some embodiments to prevent damage to the circuit. Further, the protection circuitry may utilize diode features inherent in the field effect transistors to protect against electrostatic discharge in some embodiments. The circuitry may be implemented in radio frequency sampling analog-to-digital converters and can provide for single-ended signal input and/or output for the analog-to-digital converters.Type: ApplicationFiled: June 18, 2020Publication date: December 23, 2021Applicant: Analog Devices, Inc.Inventors: Ralph D. MOORE, Franklin M. MURDEN, Peter DELOS, Srivatsan PARTHASARATHY, Javier SALCEDO, John GUIDO
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Patent number: 11057125Abstract: Various approaches to implementing digital loopback in a radio frequency (RF) system are disclosed. An example RF system includes a receiver that includes an ADC and a transmitter that includes a DAC. The apparatus includes multiple digital loopback circuits provided at different points between the digital domain processing of the receiver and the transmitter. Each digital loopback circuit may include a combiner and one or more weighing circuits, which make the circuit programmable. The combiner of a given digital loopback circuit is configured to combine a RX signal and a TX signal at a particular point of the digital domain processing of the receiver and the transmitter where said digital loopback circuit is implemented. The one or more weighting circuits are configured to define the how much of the TX signal and/or RX signal is used for said combination.Type: GrantFiled: June 25, 2020Date of Patent: July 6, 2021Assignee: ANALOG DEVICES, INC.Inventors: Peter Delos, Carroll C. Speir
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Patent number: 11025264Abstract: An ultra-wideband distributed ADC can be cascaded to build high performance radio frequency (RF) analog electronics integrated with advanced digital complementary metal-oxide-semiconductor (CMOS) electronics on the same wafer. Advantages can include wide spectral coverage, high resolution, large dynamic range, and high information processing bandwidth. Part of an overall system includes a precise, programmable, real-time delay circuit that can achieve picosecond accuracy.Type: GrantFiled: January 22, 2020Date of Patent: June 1, 2021Assignee: Analog Devices, Inc.Inventors: Ed Balboni, Frank Murden, Peter Delos
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Patent number: 10873336Abstract: Improved track and hold (T/H) circuits can help analog-to-digital converters (ADCs) achieve higher performance and lower power consumption. The improved T/H circuits can drive high speed and interleaved ADCs, and the design of the circuits enable additive and multiplicative pseudo-random dither signals to be injected in the T/H circuits. The dither signals can be used to calibrate (e.g., linearize) the T/H circuits and the ADC(s). In addition, the dither signal can be used to dither any remaining non-linearity, and to calibrate offset/gain mismatches in interleaved ADCs. The T/H circuit design also can integrate an amplifier in the T/H circuit, which can be used to improve the signal-to-noise ratio (SNR) of the ADC or to act as a variable gain amplifier (VGA) in front of the ADC.Type: GrantFiled: February 19, 2020Date of Patent: December 22, 2020Assignee: ANALOG DEVICES, INC.Inventors: Ahmed Mohamed Abdelatty Ali, Frank Murden, Peter Delos, Ralph D. Moore
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Publication number: 20200244279Abstract: An ultra-wideband distributed ADC can be cascaded to build high performance radio frequency (RF) analog electronics integrated with advanced digital complementary metal-oxide-semiconductor (CMOS) electronics on the same wafer. Advantages can include wide spectral coverage, high resolution, large dynamic range, and high information processing bandwidth. Part of an overall system includes a precise, programmable, real-time delay circuit that can achieve picosecond accuracy.Type: ApplicationFiled: January 22, 2020Publication date: July 30, 2020Applicant: Analog Devices, Inc.Inventors: Ed Balboni, Frank Murden, Peter Delos
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Publication number: 20200195265Abstract: Improved track and hold (T/H) circuits can help analog-to-digital converters (ADCs) achieve higher performance and lower power consumption. The improved T/H circuits can drive high speed and interleaved ADCs, and the design of the circuits enable additive and multiplicative pseudo-random dither signals to be injected in the T/H circuits. The dither signals can be used to calibrate (e.g., linearize) the T/H circuits and the ADC(s). In addition, the dither signal can be used to dither any remaining non-linearity, and to calibrate offset/gain mismatches in interleaved ADCs. The T/H circuit design also can integrate an amplifier in the T/H circuit, which can be used to improve the signal-to-noise ratio (SNR) of the ADC or to act as a variable gain amplifier (VGA) in front of the ADC.Type: ApplicationFiled: February 19, 2020Publication date: June 18, 2020Applicant: Analog Devices, Inc.Inventors: Ahmed Mohamed Abdelatty ALI, Frank MURDEN, Peter DELOS, Ralph D. MOORE
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Patent number: 7752537Abstract: Methods, apparatus, and computer program products for dynamic generation of forms on devices such as mobile telephones. A device user enters a form descriptor code comprising a set of alphanumeric characters. A form generator applies stored mappings between the input characters and a set of electronic form components. This identifies required form components. The form generator dynamically generates an electronic form having the identified components, and displays the form on a display screen of the device. The device user completes the form and sends the completed form to a target data processing system. The dynamic generation of a form in response to a simple input code can be used to control the format of user-entered data, such that the data is validly formatted when received at the target.Type: GrantFiled: December 16, 2005Date of Patent: July 6, 2010Assignee: International Business Machines CorporationInventors: Margaret Ann Ruth Beynon, Benjamin Peter Delo, Adam Iley