Abstract: Adaptive current limiters for capacitive loads (and associated systems, devices, and methods) are disclosed herein. In one embodiment, a signal emitting system includes a signal processing unit, an amplifier, and an emitter. The signal processing unit can determine a delta limit based on (i) system parameters and (ii) a representative magnitude corresponding to a sample of a source signal, one or more samples of a conditioned signal, or a combination thereof. The signal processing unit can further determine a ratio of (i) the delta limit to (ii) a difference between a sample of the source signal and a previous sample of the source signal, and apply a lowpass filter to the source signal to obtain a filtered signal, with filter coefficients based on the ratio. The amplifier can generate an amplified signal based on the filtered signal, and the emitter can emit an output signal based on the amplified signal.

Abstract: A system includes: a microphone configured to receive an acoustic signal; an ADC configured to convert the acoustic signal into a digital form; and a processor configured to: trim a window of the digital form; locate positive-bound zero-crossings or negative-bound zero-crossings; locate local maxima or local minima between each of the two neighboring positive-bound zero-crossings or between each of the two neighboring negative-bound zero-crossings; identify an overall maximum; determine at least one valid sample range; determine an amplitude threshold; screen the local maxima or the local minima based on the at least one valid sample range and the amplitude threshold to identify a first set of local maxima or a first set of local minima; select a second number of top local maxima or a second number of bottom local minima; expand the first set of lags; calculate normalized autocorrelations; and determine an approximated maximum normalized autocorrelation.

Abstract: A security subsystem is provided with at least a first security engine, a first set of registers and a control portion to perform a first security operation for each of a first number of data blocks of each of a first number of data segments of a first data object. In one embodiment, the security subsystem is provided with two security engines and two sets of registers to respectively perform the first security operation and a second security operation for the first data object and a similarly constituted second data object. In one embodiment, the first and second security operations are DES and hashing operations. In one embodiment, the multi-method security subsystem is embodied in a multi-service system-on-chip.