Patents by Inventor Peter Doyle

Peter Doyle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220366630
    Abstract: Position-based rendering apparatus and method for multi-die/GPU graphics processing. For example, one embodiment of a method comprises: distributing a plurality of graphics draws to a plurality of graphics processors; performing position-only shading using vertex data associated with tiles of a first draw on a first graphics processor, the first graphics processor responsively generating visibility data for each of the tiles; distributing subsets of the visibility data associated with different subsets of the tiles to different graphics processors; limiting geometry work to be performed on each tile by each graphics processor using the visibility data, each graphics processor to responsively generate rendered tiles; and wherein the rendered tiles are combined to generate a complete image frame.
    Type: Application
    Filed: July 28, 2022
    Publication date: November 17, 2022
    Applicant: Intel Corporation
    Inventors: TRAVIS SCHLUESSLER, ZACK WATERS, MICHAEL APODACA, DANIEL JOHNSTON, JASON SURPRISE, PRASOONKUMAR SURTI, SUBRAMANIAM MAIYURAN, PETER DOYLE, SAURABH SHARMA, ANKUR SHAH, MURALI RAMADOSS
  • Patent number: 11487879
    Abstract: In an embodiment, a threat score prediction model is generated for assigning a threat score to a software vulnerability. The threat score prediction model may factor one or more of (i) a degree to which the software vulnerability is described across a set of public media sources, (ii) a degree to which one or more exploits that have already been developed for the software vulnerability are described across one or more public exploit databases, (iii) information from one or more third party threat intelligence sources that characterizes one or more historic threat events associated with the software vulnerability, and/or (iv) information that characterizes at least one behavior of an enterprise network in association with the software vulnerability.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: November 1, 2022
    Assignee: TENABLE, INC.
    Inventors: Bryan Peter Doyle, Vincent Gilcreest, Wei Tai, Damien McParland, Renaud Deraison
  • Publication number: 20220284539
    Abstract: Various embodiments enable loop processing in a command processing block of the graphics hardware. Such hardware may include a processor including a command buffer, and a graphics command parser. The graphics command parser to load graphics commands from the command buffer, parse a first graphics command, store a loop count value associated with the first graphics command, parse a second graphics command and store a loop wrap address based on the second graphics command. The graphics command parser may execute a command sequence identified by the second graphics command, parse a third graphics command, the third graphics command identifying an end of the command sequence, set a new loop count value, and iteratively execute the command sequence using the loop wrap address based on the new loop count value.
    Type: Application
    Filed: January 18, 2022
    Publication date: September 8, 2022
    Inventors: Hema Chand NALLURI, Balaji VEMBU, Peter DOYLE, Michael APODACA
  • Patent number: 11403805
    Abstract: Position-based rendering apparatus and method for multi-die/GPU graphics processing. For example, one embodiment of a method comprises: distributing a plurality of graphics draws to a plurality of graphics processors; performing position-only shading using vertex data associated with tiles of a first draw on a first graphics processor, the first graphics processor responsively generating visibility data for each of the tiles; distributing subsets of the visibility data associated with different subsets of the tiles to different graphics processors; limiting geometry work to be performed on each tile by each graphics processor using the visibility data, each graphics processor to responsively generate rendered tiles; and wherein the rendered tiles are combined to generate a complete image frame.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: August 2, 2022
    Assignee: Intel Corporation
    Inventors: Travis Schluessler, Zack Waters, Michael Apodaca, Daniel Johnston, Jason Surprise, Prasoonkumar Surti, Subramaniam Maiyuran, Peter Doyle, Saurabh Sharma, Ankur Shah, Murali Ramadoss
  • Publication number: 20220138895
    Abstract: Embodiments are generally directed to compute optimization in graphics processing. An embodiment of an apparatus includes one or more processors including a multi-tile graphics processing unit (GPU) to process data, the multi-tile GPU including multiple processor tiles; and a memory for storage of data for processing, wherein the apparatus is to receive compute work for processing by the GPU, partition the compute work into multiple work units, assign each of multiple work units to one of the processor tiles, and process the compute work using the processor tiles assigned to the work units.
    Type: Application
    Filed: March 14, 2020
    Publication date: May 5, 2022
    Applicant: Intel Corporation
    Inventors: Vasanth Raganathan, Abhishek R. Appu, Ben Ashbaugh, Peter Doyle, Brandon Fliflet, Arthur Hunter, Brent Insko, Scott Janus, Altug Koker, Aditya Navale, Joydeep Ray, Kamal Sinha, Lakshminarayanan Striramassarma, Prasoonkumar Surti, James Valerio
  • Patent number: 11229759
    Abstract: Systems and methods for determining patient fatigue during ventilation of a patient are described. Novel notification and/or management of patient fatigue during ventilation are described. Further, system and methods for preventing diaphragm fatigue or weakness are described.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: January 25, 2022
    Assignee: COVIDIEN LP
    Inventors: Peter Doyle, Gardner Kimm, Phyllis Angelico
  • Patent number: 11232531
    Abstract: Various embodiments enable loop processing in a command processing block of the graphics hardware. Such hardware may include a processor including a command buffer, and a graphics command parser. The graphics command parser to load graphics commands from the command buffer, parse a first graphics command, store a loop count value associated with the first graphics command, parse a second graphics command and store a loop wrap address based on the second graphics command. The graphics command parser may execute a command sequence identified by the second graphics command, parse a third graphics command, the third graphics command identifying an end of the command sequence, set a new loop count value, and iteratively execute the command sequence using the loop wrap address based on the new loop count value.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: January 25, 2022
    Assignee: INTEL CORPORATION
    Inventors: Hema Chand Nalluri, Balaji Vembu, Peter Doyle, Michael Apodaca
  • Publication number: 20210272349
    Abstract: Position-based rendering apparatus and method for multi-die/GPU graphics processing. For example, one embodiment of a method comprises: distributing a plurality of graphics draws to a plurality of graphics processors; performing position-only shading using vertex data associated with tiles of a first draw on a first graphics processor, the first graphics processor responsively generating visibility data for each of the tiles; distributing subsets of the visibility data associated with different subsets of the tiles to different graphics processors; limiting geometry work to be performed on each tile by each graphics processor using the visibility data, each graphics processor to responsively generate rendered tiles; and wherein the rendered tiles are combined to generate a complete image frame.
    Type: Application
    Filed: May 3, 2021
    Publication date: September 2, 2021
    Applicant: Intel Corporation
    Inventors: TRAVIS SCHLUESSLER, ZACK WATERS, MICHAEL APODACA, DANIEL JOHNSTON, JASON SURPRISE, PRASOONKUMAR SURTI, SUBRAMANIAM MAIYURAN, PETER DOYLE, SAURABH SHARMA, ANKUR SHAH, MURALI RAMADOSS
  • Patent number: 10997771
    Abstract: Position-based rendering apparatus and method for multi-die/GPU graphics processing. For example, one embodiment of a method comprises: distributing a plurality of graphics draws to a plurality of graphics processors; performing position-only shading using vertex data associated with tiles of a first draw on a first graphics processor, the first graphics processor responsively generating visibility data for each of the tiles; distributing subsets of the visibility data associated with different subsets of the tiles to different graphics processors; limiting geometry work to be performed on each tile by each graphics processor using the visibility data, each graphics processor to responsively generate rendered tiles; and wherein the rendered tiles are combined to generate a complete image frame.
    Type: Grant
    Filed: August 29, 2018
    Date of Patent: May 4, 2021
    Assignee: Intel Corporation
    Inventors: Travis Schluessler, Zack Waters, Michael Apodaca, Daniel Johnston, Jason Surprise, Prasoonkumar Surti, Subramaniam Maiyuran, Peter Doyle, Saurabh Sharma, Ankur Shah, Murali Ramadoss
  • Patent number: 10963985
    Abstract: Methods, systems and apparatuses may provide for technology that determines a size of a meshlet and writes the meshlet to a full-sized buffer allocation if the size of the meshlet is greater than a partial-sized buffer allocation. The technology may also write the meshlet to the partial-sized buffer allocation if the size of the meshlet is not greater than the partial-sized buffer allocation.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: March 30, 2021
    Assignee: Intel Corporation
    Inventors: Peter Doyle, Arthur Hunter, Jr.
  • Publication number: 20210085900
    Abstract: This disclosure describes systems and methods for controlling pressure and/or flow during exhalation. The disclosure describes novel exhalation modes for ventilating a patient.
    Type: Application
    Filed: October 22, 2020
    Publication date: March 25, 2021
    Applicant: Covidien LP
    Inventors: Milenko Masic, Peter Doyle, Gardner Kimm
  • Publication number: 20200410631
    Abstract: Methods, systems and apparatuses may provide for technology that determines a size of a meshlet and writes the meshlet to a full-sized buffer allocation if the size of the meshlet is greater than a partial-sized buffer allocation. The technology may also write the meshlet to the partial-sized buffer allocation if the size of the meshlet is not greater than the partial-sized buffer allocation.
    Type: Application
    Filed: June 28, 2019
    Publication date: December 31, 2020
    Inventors: Peter Doyle, Arthur Hunter, JR.
  • Patent number: 10850056
    Abstract: This disclosure describes systems and methods for controlling pressure and/or flow during exhalation. The disclosure describes novel exhalation modes for ventilating a patient.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: December 1, 2020
    Assignee: COVIDIEN LP
    Inventors: Milenko Masic, Peter Doyle, Gardner Kimm
  • Patent number: 10806879
    Abstract: This disclosure describes systems and methods for providing an optimized proportional assist breath type during ventilation of a patient. The disclosure describes a novel breath type that delivers a target airway pressure calculated based on a desired patient effort range to a triggering patient.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: October 20, 2020
    Assignee: COVIDIEN LP
    Inventors: Peter Doyle, Mehdi M. Jafari
  • Patent number: 10796472
    Abstract: Apparatus and method for simultaneous command streamers. For example, one embodiment of an apparatus comprises: a plurality of work element queues to store work elements for a plurality of thread contexts, each work element associated with a context descriptor identifying a context storage region in memory; a plurality of command streamers, each command streamer associated with one of the plurality of work element queues, the command streamers to independently submit instructions for execution as specified by the work elements; a thread dispatcher to evaluate the thread contexts including priority values, to tag each instruction with an execution identifier (ID), and to responsively dispatch each instruction including the execution ID in accordance with the thread context; and a plurality of graphics functional units to independently execute each instruction dispatched by the thread dispatcher and to associate each instruction with a thread context based on its execution ID.
    Type: Grant
    Filed: June 30, 2018
    Date of Patent: October 6, 2020
    Assignee: Intel Corporation
    Inventors: Michael Apodaca, Ankur Shah, Ben Ashbaugh, Brandon Fliflet, Hema Nalluri, Pattabhiraman K, Peter Doyle, Joseph Koston, James Valerio, Murali Ramadoss, Altug Koker, Aditya Navale, Prasoonkumar Surti, Balaji Vembu
  • Publication number: 20200311042
    Abstract: An apparatus to facilitate index mapping is disclosed. The apparatus includes a memory and index mapping hardware, coupled to the memory, to retrieve a bitmap from the memory, process the bitmap to generate one or more mapping vectors indicating bits in the bitmap that have been set and store the one or more mapping vectors in the memory.
    Type: Application
    Filed: April 1, 2019
    Publication date: October 1, 2020
    Applicant: Intel Corporation
    Inventor: Peter Doyle
  • Publication number: 20200254202
    Abstract: This disclosure describes systems and methods for providing drive pressure ventilation of a patient. The disclosure describes a novel breath type that provides a spontaneous breath type that allows for the calculation of drive pressure that does not require invasive monitoring.
    Type: Application
    Filed: April 27, 2020
    Publication date: August 13, 2020
    Applicant: Covidien LP
    Inventors: Gardner Kimm, Cynthia Miller, Gary Milne, Gail Upham, Richard Nakai, Peter Doyle, Warren Sanborn
  • Patent number: 10733693
    Abstract: Embodiments described herein provide data processing device comprising a processor, a memory, and a large draw monitor comprising a processing unit to determine whether a vertex count for a graphics workload exceeds a threshold value, and in response to a determination that the vertex count for the graphics workload exceeds the threshold value, to divide the graphics workload over graphics processing units instantiated on multiple separate tiles. Other embodiments may be described and claimed.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: August 4, 2020
    Assignee: INTEL CORPORATION
    Inventors: Travis Schluessler, Zack Waters, Michael Apodaca, Jason Surprise, Peter Doyle
  • Publication number: 20200222645
    Abstract: This disclosure describes systems and methods for managing a move of a patient being monitored or treated by a medical system, such as a medical ventilator. The disclosure describes a novel approach for preventing a patient from being moved from a first location to second different location that is connected to a monitoring and/or treatment system, before all of the necessary hoses have been disconnected from the patient. Further, the disclosure describes a novel approach of ensuring that all of the necessary hoses are reconnected to a patient being monitored or treated by a monitoring and/or treatment system after being moved from the first location to the second different location.
    Type: Application
    Filed: March 26, 2020
    Publication date: July 16, 2020
    Applicant: Covidien LP
    Inventors: Dan Graboi, Peter Doyle
  • Publication number: 20200210590
    Abstract: In an embodiment, a threat score prediction model is generated for assigning a threat score to a software vulnerability. The threat score prediction model may factor one or more of (i) a degree to which the software vulnerability is described across a set of public media sources, (ii) a degree to which one or more exploits that have already been developed for the software vulnerability are described across one or more public exploit databases, (iii) information from one or more third party threat intelligence sources that characterizes one or more historic threat events associated with the software vulnerability, and/or (iv) information that characterizes at least one behavior of an enterprise network in association with the software vulnerability.
    Type: Application
    Filed: December 28, 2018
    Publication date: July 2, 2020
    Inventors: Bryan Peter DOYLE, Vincent GILCREEST, Wei TAI, Damien McPARLAND, Renaud DERAISON