Patents by Inventor Peter Engelhart
Peter Engelhart has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10658527Abstract: A solar cell comprising: a semiconductor substrate; a metallization paste on a surface of the semiconductor substrate; and a tunneling layer between the substrate surface and the metallization paste.Type: GrantFiled: August 9, 2016Date of Patent: May 19, 2020Assignee: HANWHA Q CELLS GMBHInventors: Peter Engelhart, Ansgar Mette, Florian Stenzel
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Publication number: 20180261703Abstract: A solar cell comprising: a semiconductor substrate; a metallization paste on a surface of the semiconductor substrate; and a tunneling layer between the substrate surface and the metallization paste.Type: ApplicationFiled: August 9, 2016Publication date: September 13, 2018Inventors: Peter ENGELHART, Ansgar METTE, Florian STENZEL
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Patent number: 9548405Abstract: A solar cell includes a semiconductor layer, a collecting layer for collecting free charge carriers from the semiconductor layer and a buffer layer which is arranged between the semiconductor layer and the collecting layer. The buffer layer is designed as a tunnel contact between the semiconductor layer and the collecting layer. The buffer layer essentially includes a material with a surface charge density of at least 1012 cm?2, preferably of at least 5×1012 cm?2, and more preferably of at least 1013 cm?2.Type: GrantFiled: December 16, 2009Date of Patent: January 17, 2017Assignee: Q-CELLS SEInventors: Peter Engelhart, Sven Wanka, Wilhelmus Mathijs Marie Kessels, Gijs Dingemans
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Patent number: 9231125Abstract: A solar cell includes a semiconductor wafer, at least one dielectric layer arranged on the semiconductor wafer, a metal layer arranged on the dielectric layer, and a contact structure arranged in the dielectric layer such that the contact structure provides an electrical connection between the metal layer and the semiconductor wafer. The contact structure has at least one first structure having a minimum dimension and at least one second structure having a maximum dimension, wherein the minimum dimension and the maximum dimension are defined along a surface of the semiconductor wafer and the minimum dimension of the first structure is greater than the maximum dimension of the second structure.Type: GrantFiled: June 26, 2012Date of Patent: January 5, 2016Assignee: HANWHA Q CELLS GMBHInventors: Andrey Stekolnikov, Robert Seguin, Maximilian Scherff, Peter Engelhart, Matthias Heimann, Til Bartel, Markus Träger, Max Köntopp
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Publication number: 20150221788Abstract: A semiconductor device, in particular a solar cell, comprises a semiconductor substrate having a semiconductor substrate surface and a passivation composed of at least one passivation layer which surface-passivates the semiconductor substrate surface, wherein the passivation layer comprises a compound composed of aluminium oxide, aluminium nitride or aluminium oxynitride and at least one further element.Type: ApplicationFiled: April 14, 2015Publication date: August 6, 2015Inventors: Peter ENGELHART, Robert SEGUIN, Wilhelmus Mathijs Marie KESSELS, Gijs DINGEMANS
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Patent number: 9029690Abstract: A semiconductor device, in particular a solar cell, comprises a semiconductor substrate having a semiconductor substrate surface and a passivation composed of at least one passivation layer which surface-passivates the semiconductor substrate surface, wherein the passivation layer comprises a compound composed of aluminum oxide, aluminum nitride or aluminum oxynitride and at least one further element.Type: GrantFiled: May 31, 2011Date of Patent: May 12, 2015Assignee: Q-Cells SEInventors: Peter Engelhart, Robert Seguin, Wilhelmus Mathijs Marie Kessels, Gijs Dingemans
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Patent number: 8933525Abstract: The invention relates to a semiconductor apparatus and a method of fabrication for a semiconductor apparatus, whereby the semiconductor apparatus includes a semiconductor layer and a passivation layer arranged on a surface of the semiconductor layer and serving for passivating the semiconductor layer surface, whereby the passivation layer comprises a chemically passivating passivation sublayer and a field-effect-passivating passivation sublayer, which are arranged one above the other on the semiconductor layer surface.Type: GrantFiled: May 31, 2010Date of Patent: January 13, 2015Assignee: Q-Cells SEInventors: Peter Engelhart, Robert Seguin, Wilhelmus Mathijs Marie Kessels, Gijs Dingemans
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Publication number: 20140224316Abstract: A solar cell includes a semiconductor wafer, at least one dielectric layer arranged on the semiconductor wafer, a metal layer arranged on the dielectric layer, and a contact structure arranged in the dielectric layer such that the contact structure provides an electrical connection between the metal layer and the semiconductor wafer. The contact structure has at least one first structure having a minimum dimension and at least one second structure having a maximum dimension, wherein the minimum dimension and the maximum dimension are defined along a surface of the semiconductor wafer and the minimum dimension of the first structure is greater than the maximum dimension of the second structure.Type: ApplicationFiled: June 26, 2012Publication date: August 14, 2014Applicant: HANWHA Q CELLS GMBHInventors: Andrey Stekolnikov, Robert Seguin, Maximilian Scherff, Peter Engelhart, Matthias Heimann, Til Bartel, Markus Trager, Max Kontopp
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Publication number: 20140087515Abstract: A method for fabricating a solar cell including a semiconductor substrate is proposed where electrical contacting is made on the back side of the semiconductor substrate. The back side of the semiconductor substrate has locally doped regions. The adjacent regions exhibit different doping from the region. The two regions are initially coated with electrically conductive material over the entire area. So that the conductive material does not short-circuit the solar cell, the two regions are covered with a thin electrically insulating layer at least at the region boundaries. The electrically conductive layer is separated by applying an etch barrier layer over the entire surface which is then removed free from masking and selectively e.g. by laser ablation, locally above the insulating layer. The conductive layer is locally removed in the area of the openings of the etch barrier layer by subsequent action of an etching solution.Type: ApplicationFiled: November 26, 2013Publication date: March 27, 2014Applicant: Institut Für Solarenergieforschung GmbHInventors: Andreas Teppe, Peter Engelhart, Jörg Müller
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Patent number: 8680655Abstract: A process for producing a semiconductor device comprises the following process steps: provision of a semiconductor substrate (1); formation of a functional layer (2) on a semiconductor surface (11) of the semiconductor substrate (1); and production of at least one doped section (3) on the semiconductor surface (11) by driving a dopant into the semiconductor substrate (1) from the functional layer (2). The functional layer (2) is formed in such a way that it passivates the semiconductor surface (11), acting as a passivation layer upon completion of the semiconductor device.Type: GrantFiled: August 5, 2011Date of Patent: March 25, 2014Assignee: Hanwha Q Cells GmbHInventors: Peter Engelhart, Stefan Bordihn, Maximillian Scherff, Bernhard Kloter
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Publication number: 20120167980Abstract: The invention relates to a solar cell with a semiconductor wafer comprising a light incidence facing front side with a base electrode, which is connected to a base layer of the semiconductor wafer, and a front side opposite to the back side with an emitter electrode, which is connected to an emitter structure of the semiconductor wafer, characterized by that the emitter structure comprises a front side emitter layer arranged on the front side of the semiconductor wafer.Type: ApplicationFiled: June 25, 2010Publication date: July 5, 2012Applicant: Q-CELLS SEInventor: Peter Engelhart
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Publication number: 20120091566Abstract: The invention relates to a semiconductor apparatus and a method of fabrication for a semiconductor apparatus, whereby the semiconductor apparatus includes a semiconductor layer and a passivation layer arranged on a surface of the semiconductor layer and serving for passivating the semiconductor layer surface, whereby the passivation layer comprises a chemically passivating passivation sublayer and a field-effect-passivating passivation sublayer, which are arranged one above the other on the semiconductor layer surface.Type: ApplicationFiled: May 31, 2010Publication date: April 19, 2012Applicant: Q-CELLS SEInventors: Peter Engelhart, Robert Seguin, Wilhelmus Mathijs Marie Kessels, Gijs Dingemans
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Publication number: 20120032310Abstract: A process for producing a semiconductor device comprises the following process steps: provision of a semiconductor substrate (1); formation of a functional layer (2) on a semiconductor surface (11) of the semiconductor substrate (1); and production of at least one doped section (3) on the semiconductor surface (11) by driving a dopant into the semiconductor substrate (1) from the functional layer (2). The functional layer (2) is formed in such a way that it passivates the semiconductor surface (11), acting as a passivation layer upon completion of the semiconductor device.Type: ApplicationFiled: August 5, 2011Publication date: February 9, 2012Applicant: Q-CELLS SEInventors: Peter ENGELHART, Stefan BORDIHN, Maximilian SCHERFF, Bernhard KLÖTER
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Publication number: 20110308581Abstract: A solar cell includes a semiconductor layer, a collecting layer for collecting free charge carriers from the semiconductor layer and a buffer layer which is arranged between the semiconductor layer and the collecting layer. The buffer layer is designed as a tunnel contact between the semiconductor layer and the collecting layer. The buffer layer essentially includes a material with a surface charge density of at least 1012 cm?2, preferably of at least 5×1012 cm?2, and more preferably of at least 1013 cm?2.Type: ApplicationFiled: December 16, 2009Publication date: December 22, 2011Applicant: Q-CELLS SEInventors: Peter Engelhart, Sven Wanka, Wilhelmus Mathijs Marie Kessels, Gijs Dingemans
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Publication number: 20110290318Abstract: A semiconductor device, in particular a solar cell, comprises a semiconductor substrate having a semiconductor substrate surface and a passivation composed of at least one passivation layer which surface-passivates the semiconductor substrate surface, wherein the passivation layer comprises a compound composed of aluminium oxide, aluminium nitride or aluminium oxynitride and at least one further element.Type: ApplicationFiled: May 31, 2011Publication date: December 1, 2011Applicant: Q-CELLS SEInventors: Peter ENGELHART, Robert SEGUIN, Wilhelmus Mathijs Marie KESSELS, Gijs DINGEMANS
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Publication number: 20110284064Abstract: A solar cell includes a semiconductor layer with first doping, an inducing layer arranged on the semiconductor layer and an inversion layer or accumulation layer which due to the inducing layer is induced underneath the inducing layer in the semiconductor layer. The inducing layer includes a material with a surface charge density of at least 1012 cm?2, preferably of at least 5×1012 cm?2, more preferably of at least 1013 cm?2.Type: ApplicationFiled: December 16, 2009Publication date: November 24, 2011Applicant: Q-CELLS SEInventors: Peter Engelhart, Sven Wanka, Wilhelmus Mathijs Marie Kessels, Gijs Dingemans
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Publication number: 20110053312Abstract: A method for fabricating a solar cell comprising a semiconductor substrate is proposed where electrical contacting is made on the back side of the semiconductor substrate. The back side of the semiconductor substrate has locally doped regions. The adjacent regions exhibit different doping from the region. The two regions are initially coated with electrically conductive material over the entire area. So that the conductive material does not short-circuit the solar cell, the two regions are covered with a thin electrically insulating layer at least at the region boundaries. The electrically conductive layer is separated by applying an etch barrier layer over the entire surface which is then removed free from masking and selectively e.g. by laser ablation, locally above the insulating layer. The conductive layer is locally removed in the area of the openings of the etch barrier layer by subsequent action of an etching solution.Type: ApplicationFiled: September 14, 2010Publication date: March 3, 2011Applicant: Institut Fuer Solarenergieforschung GmbHInventors: Andreas Teppe, Peter Engelhart, Jörg Müller
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Publication number: 20090211628Abstract: The invention concerns a solar cell (1) and a method for making same, said solar cell (1) comprising on its rear surface (3) both the emission contact (43) and the base contact (45), those two contacts (43, 45) being electrically isolated from each other by flanks (5) whereof the metal coating has been removed. The emitting zones (4) of the rear surface (3) of the cell are connected by channels to the transmitter (9) of the front face (8) of the cell. The emitting zones (4) of the rear surface (3) of the cell and the channels (7) consist of a laser. The metal coating of the side walls is removed by selective etching, said metal coating being removed only in the zone of the flanks (5) where the etching barrier layer (11) is insufficient.Type: ApplicationFiled: April 11, 2006Publication date: August 27, 2009Applicant: Institut Fur Solarenergieforschung GmbHInventors: Peter Engelhart, Andreas Teppe, Rainer Grischke, Robert Wade
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Publication number: 20080035198Abstract: A method for fabricating a solar cell (1) comprising a semiconductor substrate (2) is proposed where electrical contacting is made on the back side of the semiconductor substrate. The back side of the semiconductor substrate has locally doped regions (3). The adjacent regions (4) exhibit different doping from the region (3). The two regions (3, 4) are initially coated with electrically conductive material (5) over the entire area. So that the conductive material (5) does not short-circuit the solar cell, the two regions (3, 4) are covered with a thin electrically insulating layer (7) at least at the region boundaries (6). The electrically conductive layer (5) is separated by applying an etch barrier layer (8) over the entire surface which is then removed free from masking and selectively e.g. by laser ablation, locally above the insulating layer (7). The conductive layer is locally removed in the area of the openings (9) of the etch barrier layer (8) by subsequent action of an etching solution.Type: ApplicationFiled: October 13, 2005Publication date: February 14, 2008Applicant: INSTITUT FUR SOLARENERGIEFORSCHUNG GMBHInventors: Andreas Teppe, Peter Engelhart, Jörg Müller