Patents by Inventor Peter F. Dombrowski

Peter F. Dombrowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for back-annotating timing constraints into simulation models of field programmable gate arrays
    Patent number: 5581738
    Abstract: A method and apparatus for back-annotating timing constraints onto a logical simulation model of a field programmable gate array circuit includes a process and system for creating equations relating to the sequence of nodes between an input and output or clock input in the logical circuit and equating this to the external timing characteristics of the FPGA circuit. This linear system of equations can then be solved to obtain the individual timing constraints for each node of the circuit within the simulation model.
    Type: Grant
    Filed: June 7, 1993
    Date of Patent: December 3, 1996
    Assignee: Xilinx, Inc.
    Inventor: Peter F. Dombrowski