Patents by Inventor Peter Feldmann
Peter Feldmann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10664559Abstract: Aspects of the present invention provide a solution for calibrating a model of a complex flow system. In an embodiment, a comparison is made between the output from the model and a set of observed values for each of a plurality of nodes in the complex flow system. An adjoint sensitivity is computed for each of the nodes based on the comparison. These computed adjoint sensitivities are used to adjust a set of coefficients of the models. This calibration process can be performed multiple times, periodically and/or continuously to maximize the accuracy of the model.Type: GrantFiled: April 20, 2016Date of Patent: May 26, 2020Assignee: International Business Machines CorporationInventors: Peter Feldmann, Ying Liu
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Patent number: 10620659Abstract: A method and system to perform clock network analysis of a clock network of an integrated circuit that includes a grid obtains parameters for each transmission line of the clock network that carries a clock signal between a source of the clock signal and the grid. The method also includes obtaining models of nonlinear components of the clock network, and numerically solving a frequency domain nonlinear Harmonic Balance equation to obtain voltage values at an input and an output of each of the nonlinear components. The number of the voltage values obtained is proportional to the number of the nonlinear components. A physical implementation of the integrated circuit is obtained based on the clock network analysis.Type: GrantFiled: April 5, 2017Date of Patent: April 14, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Peter Feldmann, Haifeng Qian
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Publication number: 20180292856Abstract: A method and system to perform clock network analysis of a clock network of an integrated circuit that includes a grid obtains parameters for each transmission line of the clock network that carries a clock signal between a source of the clock signal and the grid. The method also includes obtaining models of nonlinear components of the clock network, and numerically solving a frequency domain nonlinear Harmonic Balance equation to obtain voltage values at an input and an output of each of the nonlinear components. The number of the voltage values obtained is proportional to the number of the nonlinear components. A physical implementation of the integrated circuit is obtained based on the clock network analysis.Type: ApplicationFiled: April 5, 2017Publication date: October 11, 2018Inventors: Peter Feldmann, Haifeng Qian
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Publication number: 20160306905Abstract: Aspects of the present invention provide a solution for calibrating a model of a complex flow system. In an embodiment, a comparison is made between the output from the model and a set of observed values for each of a plurality of nodes in the complex flow system. An adjoint sensitivity is computed for each of the nodes based on the comparison. These computed adjoint sensitivities are used to adjust a set of coefficients of the models. This calibration process can be performed multiple times, periodically and/or continuously to maximize the accuracy of the model.Type: ApplicationFiled: April 20, 2016Publication date: October 20, 2016Inventors: Peter Feldmann, Ying Liu
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Patent number: 9355195Abstract: Aspects of the present invention provide a solution for calibrating a model of a complex flow system. In an embodiment, a comparison is made between the output from the model and a set of observed values for each of a plurality of nodes in the complex flow system. An adjoint sensitivity is computed for each of the nodes based on the comparison. These computed adjoint sensitivities are used to adjust a set of coefficients of the models. This calibration process can be performed multiple times, periodically and/or continuously to maximize the accuracy of the model.Type: GrantFiled: March 29, 2013Date of Patent: May 31, 2016Assignee: International Business Machines CorporationInventors: Peter Feldmann, Ying Liu
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Patent number: 9189584Abstract: A method includes forming a mixed integer linear problem (MILP) capturing at least a plurality of timing windows over which aggressor net(s), electromagnetically coupled to a victim net in a circuit, produce computed cross-talk noise pulses potentially contributing to a maximum noise for the victim net. The MILP is solved to determine the maximum noise at the victim net. Responsive to the maximum noise meeting one or more criteria, at least an indication of the victim net is output. Forming may include forming a linear problem using overlapping timing windows for which noise pulses contribute to the maximum noise and converting the linear problem to the mixed integer linear problem by introducing into the linear problem binary variables that determine whether individual ones of overlapping or non-overlapping noise pulses from the one or more aggressor nets contribute to the maximum noise. Apparatus and program products are also disclosed.Type: GrantFiled: August 20, 2013Date of Patent: November 17, 2015Assignee: International Business Machines CorporationInventors: Peter Feldmann, Vladimir Zolotov
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Publication number: 20150046892Abstract: A method includes forming a mixed integer linear problem (MILP) capturing at least a plurality of timing windows over which aggressor net(s), electromagnetically coupled to a victim net in a circuit, produce computed cross-talk noise pulses potentially contributing to a maximum noise for the victim net. The MILP is solved to determine the maximum noise at the victim net. Responsive to the maximum noise meeting one or more criteria, at least an indication of the victim net is output. Forming may include forming a linear problem using overlapping timing windows for which noise pulses contribute to the maximum noise and converting the linear problem to the mixed integer linear problem by introducing into the linear problem binary variables that determine whether individual ones of overlapping or non-overlapping noise pulses from the one or more aggressor nets contribute to the maximum noise. Apparatus and program products are also disclosed.Type: ApplicationFiled: August 20, 2013Publication date: February 12, 2015Applicant: International Business Machines CorporationInventors: Peter Feldmann, Vladimir Zolotov
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Publication number: 20150046891Abstract: A method includes forming a mixed integer linear problem (MILP) capturing at least a plurality of timing windows over which aggressor net(s), electromagnetically coupled to a victim net in a circuit, produce computed cross-talk noise pulses potentially contributing to a maximum noise for the victim net. The MILP is solved to determine the maximum noise at the victim net. Responsive to the maximum noise meeting one or more criteria, at least an indication of the victim net is output. Forming may include forming a linear problem using overlapping timing windows for which noise pulses contribute to the maximum noise and converting the linear problem to the mixed integer linear problem by introducing into the linear problem binary variables that determine whether individual ones of overlapping or non-overlapping noise pulses from the one or more aggressor nets contribute to the maximum noise. Apparatus and program products are also disclosed.Type: ApplicationFiled: August 12, 2013Publication date: February 12, 2015Applicant: International Business Machines CorporationInventors: Peter Feldmann, Vladimir Zolotov
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Publication number: 20140297233Abstract: Aspects of the present invention provide a solution for calibrating a model of a complex flow system. In an embodiment, a comparison is made between the output from the model and a set of observed values for each of a plurality of nodes in the complex flow system. An adjoint sensitivity is computed for each of the nodes based on the comparison. These computed adjoint sensitivities are used to adjust a set of coefficients of the models. This calibration process can be performed multiple times, periodically and/or continuously to maximize the accuracy of the model.Type: ApplicationFiled: March 29, 2013Publication date: October 2, 2014Applicant: International Business Machines CorporationInventors: Peter Feldmann, Ying Liu
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Patent number: 8825455Abstract: An on-demand table model for semiconductor device evaluation is provided. A method of providing on-demand table models for semiconductor device evaluation, includes measuring one or more measurement values of an instance of a semiconductor device. The method further includes providing, by a processor, a table model of the instance for the semiconductor device evaluation upon receiving a request for the semiconductor device evaluation. The method further includes generating a table entry in the table model for the one or more measurement values, the table entry including one or more evaluation values of an evaluation function for the instance.Type: GrantFiled: November 4, 2011Date of Patent: September 2, 2014Assignee: International Business Machines CorporationInventors: Calvin J. Bittner, Peter Feldmann, Richard D. Kimmel, Tong Li, Ali Sadigh, David W. Winston
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Patent number: 8549452Abstract: A method for accurately performing a timing, power, and noise analysis by pre-processing the characterization points of the available libraries, storing time consuming parts of the analysis and utilizing the pre-processed information during active runs to calculate the attributes at a desired PVT point. The PVT space is preferably sub-divided into triangular or rectangular regions, preferably obtained using Delaunay triangulation. In one embodiment, the invention performs an up-front pre-processing step on the characterized libraries to compute the static portion of the interpolation function that is independent of the specific instance; and a coefficient matrix that allows for interpolation of specific instances.Type: GrantFiled: May 6, 2010Date of Patent: October 1, 2013Assignee: International Business Machines CorporationInventors: Revanta Banerji, Soroush Abbaspour, Peter Feldmann, Hemlata Gupta
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Patent number: 8515725Abstract: A system, method and computer program product for modeling a semiconductor device structure. The system and method implemented includes performing a simulation of the circuit by applying at least one input waveform on a circuit input port, and loading an output port with at least one of output load; determining, at successive time steps of the circuit simulation, a voltage value Vi on the input port, a voltage value Vo on the output port, and a current values (ia) and (ib) on the respective input and output ports. Then there is computed from the respective current value for each successive time step of the simulation, at least one charge value (Qa(Vi, Vo)) and (Qb(Vi, Vo)), respectively, as a function of Vi and Vo voltage values; and generating a nonlinear charge source from the at least one charge value, the nonlinear charge source used in modeling a dynamic behavior of the cell. A voltage controlled charge source (VCCS) is thereby determined by capturing the natural digital circuit cell behavior.Type: GrantFiled: December 2, 2010Date of Patent: August 20, 2013Assignee: International Business Machines CorporationInventors: Peter Feldmann, Sampath Dechu, Soroush Abbaspour, Ratan Singh
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Patent number: 8463571Abstract: A computer-implemented system, method, and storage device simulate a periodic voltage waveform in a network model of the integrated circuit design. The method then determines resultant current values in each segment of nets of the integrated circuit design resulting from the periodic voltage waveform and performs a Fourier transform of the periodic voltage waveform to generate a frequency domain representation of the periodic voltage waveform. The frequency domain representation comprises multiple Fourier terms, each of the Fourier terms is a frequency that is a multiple of the base frequency. Next, the method performs an AC analysis of the resultant voltage at each frequency of the multiple Fourier terms. The AC analysis provides an electrical current value for each of the frequencies of the Fourier terms for each of the nets. This allows the method to compute a root mean square current through each of the nets based on the AC analysis.Type: GrantFiled: November 12, 2010Date of Patent: June 11, 2013Assignee: International Business Machines CorporationInventors: Soroush Abbaspour, Ayesha Akhter, Peter Feldmann, Joachim Keinert
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Publication number: 20130116985Abstract: An on-demand table model for semiconductor device evaluation is provided. A method of providing on-demand table models for semiconductor device evaluation, includes measuring one or more measurement values of an instance of a semiconductor device. The method further includes providing, by a processor, a table model of the instance for the semiconductor device evaluation upon receiving a request for the semiconductor device evaluation. The method further includes generating a table entry in the table model for the one or more measurement values, the table entry including one or more evaluation values of an evaluation function for the instance.Type: ApplicationFiled: November 4, 2011Publication date: May 9, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Calvin J. BITTNER, Peter FELDMANN, Richard D. KIMMEL, Tong LI, Ali SADIGH, David W. WINSTON
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Publication number: 20130096976Abstract: A method, system, and computer program product for designing a cost-effective and reliable distribution network for a utility are provided in the illustrative embodiments. A graph connecting a set of consumers of the utility with a set of suppliers of the utility is reduced to form a plurality of clusters. A first network between a supplier and a subset of consumers in a first cluster in the plurality of clusters is improved, the improving adding a first connection in the first network to provide continuity of supply of the utility to the subset of consumers after a predetermined number of failures in the first network. A design is generated for a second network connecting the set of suppliers to the set of consumers, the second network including the first network after the improving, wherein the second network has a cost that is within a lower threshold and an upper threshold.Type: ApplicationFiled: October 18, 2011Publication date: April 18, 2013Applicant: International Business Machines CorporationInventors: Charles Jay Alpert, Peter Feldmann, Zhuo Li, Ying Liu, Sani Richard Nassif
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Patent number: 8409144Abstract: A device for facilitating the use or application of skin penetrators, the device including a puncturing part for piercing the skin, an indwelling part which can be introduced into the skin through an opening generated by the puncturing part and remains there, wherein the puncturing part and indwelling part are operably associated with the device, and a guide operably associated with the device, wherein, in use, the indwelling part is moved, via the guide, into a position of use after the puncturing part has pierced the skin. In some embodiments, the puncturing and indwelling parts are separate from each other prior to use. A method of using skin penetrators is encompassed and includes sequentially introducing the puncturing part and the indwelling part into the skin.Type: GrantFiled: June 20, 2011Date of Patent: April 2, 2013Assignee: Roche Diagnostics International AGInventors: Ulrich Haueter, Sandro Niederhauser, Peter Feldmann, Christian Hof
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Patent number: 8396910Abstract: A system and method for waveform compression includes preprocessing a collection of waveforms representing cell and/or interconnect response waveforms and constructing a representative waveform basis using linear algebra to create basis waveforms for a larger set of waveforms. The collection waveforms are represented as linear combination coefficients of an adaptive subset of the basis waveforms to compress an amount of stored information needed to reproduce the collection of waveforms. The representation of coefficients may be further compressed by, e.g., analytic representation.Type: GrantFiled: November 6, 2008Date of Patent: March 12, 2013Assignee: International Business Machines CorporationInventors: Soroush Abbaspour, Peter Feldmann, Safar Hatami
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Patent number: 8359563Abstract: In one embodiment, the invention is a moment-based characterization waveform for static timing analysis. One embodiment of a method for mapping a timing waveform associated with a gate of an integrated circuit to a characterization waveform includes using a processor to perform steps including: computing one or more moments of the timing waveform and defining the characterization waveform in accordance with the moments.Type: GrantFiled: August 17, 2009Date of Patent: January 22, 2013Assignee: International Business Machines CorporationInventors: Soroush Abbaspour, Peter Feldmann, David Ling, Chandramouli Visweswariah
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Patent number: 8290760Abstract: A solution for analyzing a circuit using initial charge information is provided. In particular, one or more nodes in a design for the circuit is initialized with an initial charge. The charge can comprise a non-equilibrium charge, thereby simulating the history effect, the impact of a charged particle, electro-static discharge (ESD), and/or the like. Operation of the circuit is then simulated over a set of input cycles based on the initial charge(s). To this extent, the non-equilibrium initial condition solution enables the state of the circuit to be controlled and solves the initial system based on these values. This capability is very useful to condition the circuit at a worst-case, best-case, and/or the like, status. Further, in one embodiment of the invention, a set of equations are provided to implement the non-equilibrium initial charge analysis, which provide a more efficient initialization of the circuit than current solutions.Type: GrantFiled: June 27, 2008Date of Patent: October 16, 2012Assignee: International Business Machines CorporationInventors: Emrah Acar, Bhavna Agrawal, Peter Feldmann, Ying Liu, Steven G. Walker
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Publication number: 20120245904Abstract: In one embodiment, the invention is a method and apparatus for waveform-based digital gate modeling for timing analysis. One embodiment of a method for modeling a gate of an integrated circuit chip includes building a transform matrix that indexes each input waveform/output waveform pair in a gate library to a plurality of different capacitive loads, obtaining an input waveform and a capacitive load associated with the gate, and, mapping the input waveform and the capacitive load to an output waveform for the gate, in accordance with the transform matrix.Type: ApplicationFiled: March 24, 2011Publication date: September 27, 2012Applicant: International Business Machines CorporationInventors: SOROUSH ABBASPOUR, Peter Feldmann, Safar Hatami