Patents by Inventor Peter Franaszek

Peter Franaszek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10832230
    Abstract: A shared ledger of transactions may be used for various purposes and may be later accessed by interested parties for ledger verification. Authenticity of transactions requires active measures to ensure transaction participants including parties to the transactions, observers to the transaction, etc., are providing accurate information for each transaction. One example method of operation may include one or more of performing one or more transactions between a subset of participants of a shared ledger system or subsystem which includes the subset of participants and witnesses assigned to the subset of participants, and synchronizing the one or more transactions exclusively by the subset of participants and the assigned witnesses, so the one or more of the transactions between the subset of participants exist with no common witnesses.
    Type: Grant
    Filed: April 4, 2017
    Date of Patent: November 10, 2020
    Assignee: International Business Machines Corporation
    Inventors: Peter A. Franaszek, Mark N. Wegman
  • Patent number: 10607297
    Abstract: A shared ledger of transactions may be used for various purposes and may be later accessed by interested parties for ledger verification. Authenticity of transactions requires active measures to ensure transaction participants including parties to the transactions, observers to the transaction, etc., are providing accurate information for each transaction.
    Type: Grant
    Filed: April 4, 2017
    Date of Patent: March 31, 2020
    Assignee: International Business Machines Corporation
    Inventors: Peter A. Franaszek, Michele Franceschini, Ashish Jagmohan, Mark N. Wegman
  • Publication number: 20180285983
    Abstract: A shared ledger of transactions may be used for various purposes and may be later accessed by interested parties for ledger verification. Authenticity of transactions requires active measures to ensure transaction participants including parties to the transactions, observers to the transaction, etc., are providing accurate information for each transaction.
    Type: Application
    Filed: April 4, 2017
    Publication date: October 4, 2018
    Inventors: Peter A. Franaszek, Michele Franceschini, Ashish Jagmohan, Mark N. Wegman
  • Publication number: 20180285838
    Abstract: A shared ledger of transactions may be used for various purposes and may be later accessed by interested parties for ledger verification. Authenticity of transactions requires active measures to ensure transaction participants including parties to the transactions, observers to the transaction, etc., are providing accurate information for each transaction. One example method of operation may include one or more of performing one or more transactions between a subset of participants of a shared ledger system or subsystem which includes the subset of participants and witnesses assigned to the subset of participants, and synchronizing the one or more transactions exclusively by the subset of participants and the assigned witnesses, so the one or more of the transactions between the subset of participants exist with no common witnesses.
    Type: Application
    Filed: April 4, 2017
    Publication date: October 4, 2018
    Inventors: Peter A. Franaszek, Mark N. Wegman
  • Patent number: 9836238
    Abstract: A compression engine and method for optimizing the high compression of a content addressable memory (CAM) and the efficiency of a static random access memory (SRAM) by synchronizing a CAM with a relatively small near history buffer and an SRAM with a larger far history buffer. An input stream is processed in parallel through the near history and far history components and an encoder selects for the compressed output the longest matching strings from matching strings provided by each of the near history and far history components.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: December 5, 2017
    Assignee: International Business Machines Corporation
    Inventors: Bulent Abali, Peter A. Franaszek, Luis A. Lastras
  • Publication number: 20170192708
    Abstract: A compression engine and method for optimizing the high compression of a content addressable memory (CAM) and the efficiency of a static random access memory (SRAM) by synchronizing a CAM with a relatively small near history buffer and an SRAM with a larger far history buffer. An input stream is processed in parallel through the near history and far history components and an encoder selects for the compressed output the longest matching strings from matching strings provided by each of the near history and far history components.
    Type: Application
    Filed: December 31, 2015
    Publication date: July 6, 2017
    Inventors: Bulent Abali, Peter A. Franaszek, Luis A. Lastras
  • Patent number: 8448178
    Abstract: Systems and methods are provided that schedule task requests within a computing system based upon the history of task requests. The history of task requests can be represented by a historical log that monitors the receipt of high priority task request submissions over time. This historical log in combination with other user defined scheduling rules is used to schedule the task requests. Task requests in the computer system are maintained in a list that can be divided into a hierarchy of queues differentiated by the level of priority associated with the task requests contained within that queue. The user-defined scheduling rules give scheduling priority to the higher priority task requests, and the historical log is used to predict subsequent submissions of high priority task requests so that lower priority task requests that would interfere with the higher priority task requests will be delayed or will not be scheduled for processing.
    Type: Grant
    Filed: March 20, 2012
    Date of Patent: May 21, 2013
    Assignee: International Business Machines Corporation
    Inventors: David M Daly, Peter A Franaszek, Luis A Lastras-Montano
  • Patent number: 8286170
    Abstract: A computer system includes a plurality of multi-threaded processors, and a scheduler. The multi-threaded processors each have a set of hardware threads forming a pool of hardware threads. The scheduler allocates hardware threads of the pool of hardware threads to one or more guest operating systems based on priorities of the guest operating systems. The priorities of the guest operating systems are based on logical processors requested by the guest operating systems.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: October 9, 2012
    Assignee: International Business Machines Corporation
    Inventor: Peter A. Franaszek
  • Patent number: 8250265
    Abstract: A method of transmitting compressed data from a main memory to an input/output adaptor (IOA)/input/output processor (IOP), includes sending compressed memory directory information to the IOA/IOP and copying a content of the memory to the IOA/IOP using a direct memory access (DMA) operation, without decompressing the data.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: August 21, 2012
    Assignee: International Business Machines Corporation
    Inventors: Caroline Benveniste, Vittorio Castelli, Peter A. Franaszek
  • Patent number: 8234229
    Abstract: A method for predicting a subsequent resource utilization in a computer system having a plurality of devices includes the step of monitoring, over a period of time, a contemporaneous resource utilization and a number of active devices to obtain monitored values of the contemporaneous resource utilization and the number of active devices. The subsequent resource utilization is predicted, based upon the monitored values of the contemporaneous resource utilization and the number of active devices. Additionally, methods are described herein for identifying resource saturation and predicting the effects of adding a new device in a computer system.
    Type: Grant
    Filed: July 27, 2001
    Date of Patent: July 31, 2012
    Assignee: International Business Machines Corporation
    Inventors: Vittorio Castelli, Peter A. Franaszek, Joy Aloysius Thomas
  • Patent number: 8230139
    Abstract: In a computer system supporting memory compression, wherein memory compressed data is managed in units of memory sectors of size S, wherein data is stored on disk in a different compressed format, and wherein data on said disk is managed in units of disk sectors of size D, a method for storing memory compressed data on a compressed disk includes combining at least one of compressed memory directory information, a system header, compressed data controls, and pads into a data structure having a same size S as a memory sector, grouping the data structure and the data contained in the desired memory sectors into groups of D/S items, and storing each of the groups in a separate disk sector.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: July 24, 2012
    Assignee: International Business Machines Corporation
    Inventors: Caroline Benveniste, Vittorio Castelli, Peter A. Franaszek
  • Publication number: 20120180060
    Abstract: Systems and methods are provided that schedule task requests within a computing system based upon the history of task requests. The history of task requests can be represented by a historical log that monitors the receipt of high priority task request submissions over time. This historical log in combination with other user defined scheduling rules is used to schedule the task requests. Task requests in the computer system are maintained in a list that can be divided into a hierarchy of queues differentiated by the level of priority associated with the task requests contained within that queue. The user-defined scheduling rules give scheduling priority to the higher priority task requests, and the historical log is used to predict subsequent submissions of high priority task requests so that lower priority task requests that would interfere with the higher priority task requests will be delayed or will not be scheduled for processing.
    Type: Application
    Filed: March 20, 2012
    Publication date: July 12, 2012
    Applicant: International Business Machines Corporation
    Inventors: David M. DALY, Peter A. FRANASZEK, Luis A. LASTRAS-MONTANO
  • Publication number: 20120131273
    Abstract: In a computer system supporting memory compression, wherein memory compressed data is managed in units of memory sectors of size S, wherein data is stored on disk in a different compressed format, and wherein data on said disk is managed in units of disk sectors of size D, a method for storing memory compressed data on a compressed disk includes combining at least one of compressed memory directory information, a system header, compressed data controls, and pads into a data structure having a same size S as a memory sector, grouping the data structure and the data contained in the desired memory sectors into groups of D/S items, and storing each of the groups in a separate disk sector.
    Type: Application
    Filed: January 30, 2012
    Publication date: May 24, 2012
    Applicant: IBM Corporation
    Inventors: Caroline Benveniste, Vittorio Castelli, Peter A. Franaszek
  • Patent number: 8185899
    Abstract: Systems and methods are provided that schedule task requests within a computing system based upon the history of task requests. The history of task requests can be represented by a historical log that monitors the receipt of high priority task request submissions over time. This historical log in combination with other user defined scheduling rules is used to schedule the task requests. Task requests in the computer system are maintained in a list that can be divided into a hierarchy of queues differentiated by the level of priority associated with the task requests contained within that queue. The user-defined scheduling rules give scheduling priority to the higher priority task requests, and the historical log is used to predict subsequent submissions of high priority task requests so that lower priority task requests that would interfere with the higher priority task requests will be delayed or will not be scheduled for processing.
    Type: Grant
    Filed: March 7, 2007
    Date of Patent: May 22, 2012
    Assignee: International Business Machines Corporation
    Inventors: David M. Daly, Peter A. Franaszek, Luis A. Lastras-Montano
  • Patent number: 8161206
    Abstract: In a computer system supporting memory compression and wherein data is stored on a disk in a different compressed format, and wherein an IOA (input/output adaptor)/IOP (input/output processor) selectively reads from and writes to a main memory through a direct memory access (DMA) operation, a method for transmitting compressed data from the IOA/IOP to the main memory includes reserving a set of free memory sectors to contain the data in said main memory, sending to the IOA/IOP addresses of said memory sectors, copying the data from the IOA/IOP to said memory sectors using said DMA operation, constructing at the IOA/IOP compressed memory directory information defining how and where the data is stored in memory, sending the memory directory information to a memory controller, and storing the memory directory information in the compressed memory directory structure.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: April 17, 2012
    Assignee: International Business Machines Corporation
    Inventors: Caroline Benveniste, Vittorio Castelli, Peter A. Franaszek
  • Patent number: 8136106
    Abstract: A system includes a processor, a memory, a cache, program software, and a marker management engine. The software includes at least one marker. Each marker is a computer instruction and marks distinct computer code sections in the software. The engine (a) determines whether one of the at least one marker is executed during the execution of the program software, (b) monitors data accesses by the at least one processor to the at least one cache and the main memory, (c) stores at least one of the monitored data accesses in a pre-defined location in the main memory, and (d) optimizes only the computer code section indicated by the determined marker of the program software executed by the at least one processor based on the stored data accesses.
    Type: Grant
    Filed: May 13, 2008
    Date of Patent: March 13, 2012
    Assignee: International Business Machines Corporation
    Inventors: Peter A. Franaszek, Luis Alfonso Lastras MontaƱo, R. Brett Tremaine
  • Publication number: 20110185132
    Abstract: In a computer system supporting memory compression and wherein data is stored on a disk in a different compressed format, and wherein an IOA (input/output adaptor)/IOP (input/output processor) selectively reads from and writes to a main memory through a direct memory access (DMA) operation, a method for transmitting compressed data from the IOA/IOP to the main memory includes reserving a set of free memory sectors to contain the data in said main memory, sending to the IOA/IOP addresses of said memory sectors, copying the data from the IOA/IOP to said memory sectors using said DMA operation, constructing at the IOA/IOP compressed memory directory information defining how and where the data is stored in memory, sending the memory directory information to a memory controller, and storing the memory directory information in the compressed memory directory structure.
    Type: Application
    Filed: April 8, 2011
    Publication date: July 28, 2011
    Applicant: IBM Corporation
    Inventors: Caroline Benveniste, Vittorio Castelli, Peter A. Franaszek
  • Publication number: 20110179197
    Abstract: A method of transmitting compressed data from a main memory to an input/output adaptor (IOA)/input/output processor (IOP), includes sending compressed memory directory information to the IOA/IOP and copying a content of the memory to the IOA/IOP using a direct memory access (DMA) operation, without decompressing the data.
    Type: Application
    Filed: March 31, 2011
    Publication date: July 21, 2011
    Applicant: IBM Corporation
    Inventors: Caroline Benveniste, Vittorio Castelli, Peter A. Franaszek
  • Patent number: 7982636
    Abstract: The present invention describes lossless data compression/decompression methods and systems. A random access memory (RAM) operates as a static dictionary and includes commonly used strings/symbols/phrases/words. An input buffer operates as a dynamic dictionary and includes input strings/phrases/symbols/words. A set-associative cache memory operates as a hash table, and includes pointers pointing to the commonly used strings/symbols/phrases/words in the static dictionary and/or pointing to one or more of the input strings/phrases/symbols/words in the dynamic dictionary. Alternatively, the set-associative cache memory combines the dynamic dictionary, the static dictionary and the hash table. When encountering a symbol/phrase/string/word in the static or dynamic dictionary in an input stream, a compressor logic or module places a pointer pointing to the symbol/phrase/string/word at a current location on the output stream.
    Type: Grant
    Filed: August 20, 2009
    Date of Patent: July 19, 2011
    Assignee: International Business Machines Corporation
    Inventors: Bulent Abali, Mohammad Banikazemi, Peter Franaszek, Luis A. Lastras, Dan E. Poff
  • Patent number: 7979602
    Abstract: A method (and system) of storing information, includes storing main memory compressed information onto a memory compressed disk, where pages are stored and retrieved individually, without decompressing the main memory compressed information.
    Type: Grant
    Filed: August 20, 2009
    Date of Patent: July 12, 2011
    Assignee: International Business Machines Corporation
    Inventors: Caroline Benveniste, Vittorio Castelli, Peter A. Franaszek