Patents by Inventor Peter Franaszek
Peter Franaszek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10832230Abstract: A shared ledger of transactions may be used for various purposes and may be later accessed by interested parties for ledger verification. Authenticity of transactions requires active measures to ensure transaction participants including parties to the transactions, observers to the transaction, etc., are providing accurate information for each transaction. One example method of operation may include one or more of performing one or more transactions between a subset of participants of a shared ledger system or subsystem which includes the subset of participants and witnesses assigned to the subset of participants, and synchronizing the one or more transactions exclusively by the subset of participants and the assigned witnesses, so the one or more of the transactions between the subset of participants exist with no common witnesses.Type: GrantFiled: April 4, 2017Date of Patent: November 10, 2020Assignee: International Business Machines CorporationInventors: Peter A. Franaszek, Mark N. Wegman
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Patent number: 10607297Abstract: A shared ledger of transactions may be used for various purposes and may be later accessed by interested parties for ledger verification. Authenticity of transactions requires active measures to ensure transaction participants including parties to the transactions, observers to the transaction, etc., are providing accurate information for each transaction.Type: GrantFiled: April 4, 2017Date of Patent: March 31, 2020Assignee: International Business Machines CorporationInventors: Peter A. Franaszek, Michele Franceschini, Ashish Jagmohan, Mark N. Wegman
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Publication number: 20180285983Abstract: A shared ledger of transactions may be used for various purposes and may be later accessed by interested parties for ledger verification. Authenticity of transactions requires active measures to ensure transaction participants including parties to the transactions, observers to the transaction, etc., are providing accurate information for each transaction.Type: ApplicationFiled: April 4, 2017Publication date: October 4, 2018Inventors: Peter A. Franaszek, Michele Franceschini, Ashish Jagmohan, Mark N. Wegman
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Publication number: 20180285838Abstract: A shared ledger of transactions may be used for various purposes and may be later accessed by interested parties for ledger verification. Authenticity of transactions requires active measures to ensure transaction participants including parties to the transactions, observers to the transaction, etc., are providing accurate information for each transaction. One example method of operation may include one or more of performing one or more transactions between a subset of participants of a shared ledger system or subsystem which includes the subset of participants and witnesses assigned to the subset of participants, and synchronizing the one or more transactions exclusively by the subset of participants and the assigned witnesses, so the one or more of the transactions between the subset of participants exist with no common witnesses.Type: ApplicationFiled: April 4, 2017Publication date: October 4, 2018Inventors: Peter A. Franaszek, Mark N. Wegman
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Patent number: 9836238Abstract: A compression engine and method for optimizing the high compression of a content addressable memory (CAM) and the efficiency of a static random access memory (SRAM) by synchronizing a CAM with a relatively small near history buffer and an SRAM with a larger far history buffer. An input stream is processed in parallel through the near history and far history components and an encoder selects for the compressed output the longest matching strings from matching strings provided by each of the near history and far history components.Type: GrantFiled: December 31, 2015Date of Patent: December 5, 2017Assignee: International Business Machines CorporationInventors: Bulent Abali, Peter A. Franaszek, Luis A. Lastras
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Publication number: 20170192708Abstract: A compression engine and method for optimizing the high compression of a content addressable memory (CAM) and the efficiency of a static random access memory (SRAM) by synchronizing a CAM with a relatively small near history buffer and an SRAM with a larger far history buffer. An input stream is processed in parallel through the near history and far history components and an encoder selects for the compressed output the longest matching strings from matching strings provided by each of the near history and far history components.Type: ApplicationFiled: December 31, 2015Publication date: July 6, 2017Inventors: Bulent Abali, Peter A. Franaszek, Luis A. Lastras
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Patent number: 8448178Abstract: Systems and methods are provided that schedule task requests within a computing system based upon the history of task requests. The history of task requests can be represented by a historical log that monitors the receipt of high priority task request submissions over time. This historical log in combination with other user defined scheduling rules is used to schedule the task requests. Task requests in the computer system are maintained in a list that can be divided into a hierarchy of queues differentiated by the level of priority associated with the task requests contained within that queue. The user-defined scheduling rules give scheduling priority to the higher priority task requests, and the historical log is used to predict subsequent submissions of high priority task requests so that lower priority task requests that would interfere with the higher priority task requests will be delayed or will not be scheduled for processing.Type: GrantFiled: March 20, 2012Date of Patent: May 21, 2013Assignee: International Business Machines CorporationInventors: David M Daly, Peter A Franaszek, Luis A Lastras-Montano
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Patent number: 8286170Abstract: A computer system includes a plurality of multi-threaded processors, and a scheduler. The multi-threaded processors each have a set of hardware threads forming a pool of hardware threads. The scheduler allocates hardware threads of the pool of hardware threads to one or more guest operating systems based on priorities of the guest operating systems. The priorities of the guest operating systems are based on logical processors requested by the guest operating systems.Type: GrantFiled: January 31, 2007Date of Patent: October 9, 2012Assignee: International Business Machines CorporationInventor: Peter A. Franaszek
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Patent number: 8250265Abstract: A method of transmitting compressed data from a main memory to an input/output adaptor (IOA)/input/output processor (IOP), includes sending compressed memory directory information to the IOA/IOP and copying a content of the memory to the IOA/IOP using a direct memory access (DMA) operation, without decompressing the data.Type: GrantFiled: March 31, 2011Date of Patent: August 21, 2012Assignee: International Business Machines CorporationInventors: Caroline Benveniste, Vittorio Castelli, Peter A. Franaszek
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Patent number: 8234229Abstract: A method for predicting a subsequent resource utilization in a computer system having a plurality of devices includes the step of monitoring, over a period of time, a contemporaneous resource utilization and a number of active devices to obtain monitored values of the contemporaneous resource utilization and the number of active devices. The subsequent resource utilization is predicted, based upon the monitored values of the contemporaneous resource utilization and the number of active devices. Additionally, methods are described herein for identifying resource saturation and predicting the effects of adding a new device in a computer system.Type: GrantFiled: July 27, 2001Date of Patent: July 31, 2012Assignee: International Business Machines CorporationInventors: Vittorio Castelli, Peter A. Franaszek, Joy Aloysius Thomas
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Patent number: 8230139Abstract: In a computer system supporting memory compression, wherein memory compressed data is managed in units of memory sectors of size S, wherein data is stored on disk in a different compressed format, and wherein data on said disk is managed in units of disk sectors of size D, a method for storing memory compressed data on a compressed disk includes combining at least one of compressed memory directory information, a system header, compressed data controls, and pads into a data structure having a same size S as a memory sector, grouping the data structure and the data contained in the desired memory sectors into groups of D/S items, and storing each of the groups in a separate disk sector.Type: GrantFiled: January 30, 2012Date of Patent: July 24, 2012Assignee: International Business Machines CorporationInventors: Caroline Benveniste, Vittorio Castelli, Peter A. Franaszek
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Publication number: 20120180060Abstract: Systems and methods are provided that schedule task requests within a computing system based upon the history of task requests. The history of task requests can be represented by a historical log that monitors the receipt of high priority task request submissions over time. This historical log in combination with other user defined scheduling rules is used to schedule the task requests. Task requests in the computer system are maintained in a list that can be divided into a hierarchy of queues differentiated by the level of priority associated with the task requests contained within that queue. The user-defined scheduling rules give scheduling priority to the higher priority task requests, and the historical log is used to predict subsequent submissions of high priority task requests so that lower priority task requests that would interfere with the higher priority task requests will be delayed or will not be scheduled for processing.Type: ApplicationFiled: March 20, 2012Publication date: July 12, 2012Applicant: International Business Machines CorporationInventors: David M. DALY, Peter A. FRANASZEK, Luis A. LASTRAS-MONTANO
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Publication number: 20120131273Abstract: In a computer system supporting memory compression, wherein memory compressed data is managed in units of memory sectors of size S, wherein data is stored on disk in a different compressed format, and wherein data on said disk is managed in units of disk sectors of size D, a method for storing memory compressed data on a compressed disk includes combining at least one of compressed memory directory information, a system header, compressed data controls, and pads into a data structure having a same size S as a memory sector, grouping the data structure and the data contained in the desired memory sectors into groups of D/S items, and storing each of the groups in a separate disk sector.Type: ApplicationFiled: January 30, 2012Publication date: May 24, 2012Applicant: IBM CorporationInventors: Caroline Benveniste, Vittorio Castelli, Peter A. Franaszek
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Patent number: 8185899Abstract: Systems and methods are provided that schedule task requests within a computing system based upon the history of task requests. The history of task requests can be represented by a historical log that monitors the receipt of high priority task request submissions over time. This historical log in combination with other user defined scheduling rules is used to schedule the task requests. Task requests in the computer system are maintained in a list that can be divided into a hierarchy of queues differentiated by the level of priority associated with the task requests contained within that queue. The user-defined scheduling rules give scheduling priority to the higher priority task requests, and the historical log is used to predict subsequent submissions of high priority task requests so that lower priority task requests that would interfere with the higher priority task requests will be delayed or will not be scheduled for processing.Type: GrantFiled: March 7, 2007Date of Patent: May 22, 2012Assignee: International Business Machines CorporationInventors: David M. Daly, Peter A. Franaszek, Luis A. Lastras-Montano
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Patent number: 8161206Abstract: In a computer system supporting memory compression and wherein data is stored on a disk in a different compressed format, and wherein an IOA (input/output adaptor)/IOP (input/output processor) selectively reads from and writes to a main memory through a direct memory access (DMA) operation, a method for transmitting compressed data from the IOA/IOP to the main memory includes reserving a set of free memory sectors to contain the data in said main memory, sending to the IOA/IOP addresses of said memory sectors, copying the data from the IOA/IOP to said memory sectors using said DMA operation, constructing at the IOA/IOP compressed memory directory information defining how and where the data is stored in memory, sending the memory directory information to a memory controller, and storing the memory directory information in the compressed memory directory structure.Type: GrantFiled: April 8, 2011Date of Patent: April 17, 2012Assignee: International Business Machines CorporationInventors: Caroline Benveniste, Vittorio Castelli, Peter A. Franaszek
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Patent number: 8136106Abstract: A system includes a processor, a memory, a cache, program software, and a marker management engine. The software includes at least one marker. Each marker is a computer instruction and marks distinct computer code sections in the software. The engine (a) determines whether one of the at least one marker is executed during the execution of the program software, (b) monitors data accesses by the at least one processor to the at least one cache and the main memory, (c) stores at least one of the monitored data accesses in a pre-defined location in the main memory, and (d) optimizes only the computer code section indicated by the determined marker of the program software executed by the at least one processor based on the stored data accesses.Type: GrantFiled: May 13, 2008Date of Patent: March 13, 2012Assignee: International Business Machines CorporationInventors: Peter A. Franaszek, Luis Alfonso Lastras MontaƱo, R. Brett Tremaine
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Publication number: 20110185132Abstract: In a computer system supporting memory compression and wherein data is stored on a disk in a different compressed format, and wherein an IOA (input/output adaptor)/IOP (input/output processor) selectively reads from and writes to a main memory through a direct memory access (DMA) operation, a method for transmitting compressed data from the IOA/IOP to the main memory includes reserving a set of free memory sectors to contain the data in said main memory, sending to the IOA/IOP addresses of said memory sectors, copying the data from the IOA/IOP to said memory sectors using said DMA operation, constructing at the IOA/IOP compressed memory directory information defining how and where the data is stored in memory, sending the memory directory information to a memory controller, and storing the memory directory information in the compressed memory directory structure.Type: ApplicationFiled: April 8, 2011Publication date: July 28, 2011Applicant: IBM CorporationInventors: Caroline Benveniste, Vittorio Castelli, Peter A. Franaszek
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Publication number: 20110179197Abstract: A method of transmitting compressed data from a main memory to an input/output adaptor (IOA)/input/output processor (IOP), includes sending compressed memory directory information to the IOA/IOP and copying a content of the memory to the IOA/IOP using a direct memory access (DMA) operation, without decompressing the data.Type: ApplicationFiled: March 31, 2011Publication date: July 21, 2011Applicant: IBM CorporationInventors: Caroline Benveniste, Vittorio Castelli, Peter A. Franaszek
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Patent number: 7982636Abstract: The present invention describes lossless data compression/decompression methods and systems. A random access memory (RAM) operates as a static dictionary and includes commonly used strings/symbols/phrases/words. An input buffer operates as a dynamic dictionary and includes input strings/phrases/symbols/words. A set-associative cache memory operates as a hash table, and includes pointers pointing to the commonly used strings/symbols/phrases/words in the static dictionary and/or pointing to one or more of the input strings/phrases/symbols/words in the dynamic dictionary. Alternatively, the set-associative cache memory combines the dynamic dictionary, the static dictionary and the hash table. When encountering a symbol/phrase/string/word in the static or dynamic dictionary in an input stream, a compressor logic or module places a pointer pointing to the symbol/phrase/string/word at a current location on the output stream.Type: GrantFiled: August 20, 2009Date of Patent: July 19, 2011Assignee: International Business Machines CorporationInventors: Bulent Abali, Mohammad Banikazemi, Peter Franaszek, Luis A. Lastras, Dan E. Poff
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Patent number: 7979602Abstract: A method (and system) of storing information, includes storing main memory compressed information onto a memory compressed disk, where pages are stored and retrieved individually, without decompressing the main memory compressed information.Type: GrantFiled: August 20, 2009Date of Patent: July 12, 2011Assignee: International Business Machines CorporationInventors: Caroline Benveniste, Vittorio Castelli, Peter A. Franaszek