Patents by Inventor Peter Frijlink

Peter Frijlink has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250043818
    Abstract: An inner ring for a self-aligning roller bearing has a raceway, a rolling-element retaining flange at a first axial side of the raceway, a filling slot in the retaining flange, a first axial end face, and a seal surface having a first end at the first axial end face and a second end at the retaining flange. The retaining flange has a flange width between the seal surface connecting portion and a raceway connecting portion, the raceway connecting portion has a first radius and the retaining flange has a flange radius, and the flange radius is from 100.2% to 103.7% of the first radius.
    Type: Application
    Filed: November 23, 2022
    Publication date: February 6, 2025
    Inventors: Bo Niclas THIM, Lars STIGSJÖÖ, Eduardo Daniel ORTEGA PERDOMO, Peter FRIJLINK
  • Patent number: 10340376
    Abstract: A process for fabricating a heterojunction field-effect transistor including a semiconductor structure made up of superposed layers, including: providing on a substrate layer (1) a buffer layer (2), a channel layer (3) and a barrier layer (4), the layers being made of materials having hexagonal crystal structures of the Ga(1-p-q)Al(p)In(q)N type; forming an opening in a dielectric masking layer (5) deposited on the barrier layer; growing by high-temperature epitaxy a semiconductor material (6, 6?) having a hexagonal crystal structure, namely Ga(1-x?-y?)Al(x?)In(y?)N, doped with germanium, on a growth zone defined by the opening formed in the masking layer; and depositing a source or drain contact electrode (15, 16) on the material thus deposited by epitaxy, and a gate electrode (13) in a location outside of the growth zone.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: July 2, 2019
    Assignee: OMMIC
    Inventor: Peter Frijlink
  • Publication number: 20170092751
    Abstract: A process for fabricating a heterojunction field-effect transistor including a semiconductor structure made up of superposed layers, including: providing on a substrate layer (1) a buffer layer (2), a channel layer (3) and a barrier layer (4), the layers being made of materials having hexagonal crystal structures of the Ga(1-p-q)Al(p)In(q)N type; forming an opening in a dielectric masking layer (5) deposited on the barrier layer; growing by high-temperature epitaxy a semiconductor material (6, 6?) having a hexagonal crystal structure, namely Ga(1-x?-y?)Al(x?)In(y?)N, doped with germanium, on a growth zone defined by the opening formed in the masking layer; and depositing a source or drain contact electrode (15, 16) on the material thus deposited by epitaxy, and a gate electrode (13) in a location outside of the growth zone.
    Type: Application
    Filed: March 10, 2015
    Publication date: March 30, 2017
    Inventor: Peter FRIJLINK
  • Patent number: 7937203
    Abstract: The invention relates to a control system for a vehicle with wheels, where at least one wheel is connected with means for braking and/or driving the wheel, the control system comprising a measuring device to measure a rotational speed of the wheel, a longitudinal force and a vertical force that occur at the wheel-road contact, and a control unit connected to the measuring device, to control the braking and/or driving of the wheel. The system is equipped to determine the second derivative (SD) of the wheel speed to the quotient of the longitudinal force and the vertical force and use this parameter to control the braking and/or driving the wheel.
    Type: Grant
    Filed: December 5, 2005
    Date of Patent: May 3, 2011
    Assignee: AB SKF
    Inventors: Paul Meaney, Simon Le Floc'h, Peter Frijlink
  • Publication number: 20080195291
    Abstract: The invention relates to a control system for a vehicle with wheels, where at least one wheel is connected with means for braking and/or driving the wheel, the control system comprising a measuring device to measure a rotational speed of the wheel, a longitudinal force and a vertical force that occur at the wheel-road contact, and a control unit connected to the measuring device, to control the braking and/or driving of the wheel. The system is equipped to determine the second derivative (SD) of the wheel speed to the quotient of the longitudinal force and the vertical force and use this parameter to control the braking and/or driving the wheel.
    Type: Application
    Filed: December 5, 2005
    Publication date: August 14, 2008
    Inventors: Paul Meaney, Simon Le Floc'h, Peter Frijlink
  • Patent number: 6899764
    Abstract: A chemical vapor deposition reactor having a process chamber accommodating a substrate holder for wafers, a first gas flow of reactive gases to process the wafers and a crown-shaped gas-collector surrounding the substrate-holder, wherein said reactor further comprises: a base plate and a cover plate disposed respectively beneath and above the substrate-holder, an outer ring surrounding the gas-collector and touching both the base plate and the cover-plate, and a second flow of non-reactive gases propagating in spaces outside the process chamber limited by the base and cover plates and the outer ring, and said second flow acting as a counter-flow for preventing the first reactive gas flow to exit from the process chamber but through the gas-collector.
    Type: Grant
    Filed: June 19, 2002
    Date of Patent: May 31, 2005
    Assignee: Aixtron AG
    Inventor: Peter Frijlink
  • Publication number: 20040200412
    Abstract: A chemical vapor deposition reactor having a process chamber accommodating a substrate holder for wafers, a first gas flow of reactive gases to process the wafers and a crown-shaped gas-collector surrounding the substrate-holder, wherein said reactor further comprises: a base plate and a cover plate disposed respectively beneath and above the substrate-holder, an outer ring surrounding the gas-collector and touching both the base plate and the cover-plate, and a second flow of non-reactive gases propagating in spaces outside the process chamber limited by the base and cover plates and the outer ring, and said second flow acting as a counter-flow for preventing the first reactive gas flow to exit from the process chamber but through the gas-collector.
    Type: Application
    Filed: June 19, 2002
    Publication date: October 14, 2004
    Inventor: Peter Frijlink
  • Patent number: 6703701
    Abstract: A semiconductor device comprising integrated circuit elements realized by means of a stack of layers of semiconductor materials provided on a substrate of semiconductor material and comprising means for preventing the pollution of the circuit elements and of the substrate by hydrogen originating from their environment is characterized in that said means are formed by a layer of a material which absorbs hydrogen (or hydrogen getter) (10), which forms a pattern which is integrated with the circuit elements and whose outer surface (11) is exposed and in contact with the environment. This device, of the MMIC type, forms part of a module of a spatial or terrestrial telecommunication system.
    Type: Grant
    Filed: October 5, 1999
    Date of Patent: March 9, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Pierre Baudet, Peter Frijlink
  • Publication number: 20030071339
    Abstract: A semiconductor device comprising integrated circuit elements realized by means of a stack of layers of semiconductor materials provided on a substrate of semiconductor material and comprising means for preventing the pollution of the circuit elements and of the substrate by hydrogen originating from their environment is characterized in that said means are formed by a layer of a material which absorbs hydrogen (or hydrogen getter) (10), which forms a pattern which is integrated with the circuit elements and whose outer surface (11) is exposed and in contact with the environment.
    Type: Application
    Filed: October 5, 1999
    Publication date: April 17, 2003
    Inventors: PIERRE BAUDET, PETER FRIJLINK
  • Patent number: 6475286
    Abstract: The invention relates to seal means (I, TR) for sealing two substantially flat closing surfaces (9a,7a), respectively of two separable elements (9,7), for forming a boundary between a first space (101) and a second space (102), in order to prevent a first gas flow (&PHgr;1) propagating in the first space to exit through an interface (I) between said two closing surfaces disposed one opposite to the other for sealing, comprising the construction of a set of troughs (TR) in at least one of the closing surfaces (9), carried out throughout the length (L) of said boundary in the direction of said first flow, and comprising a counter-flow (&PHgr;2), propagating from the second space (102) through said troughs, which have construction parameters including a width (w), a depth (h) and a separating width (W), determined in combination with the height (H) of the interface (I) and said length (L) of the boundary, for preventing the first flow (&PHgr;1) to exit through the interface (I) along the troughs (TR) and along t
    Type: Grant
    Filed: July 12, 2000
    Date of Patent: November 5, 2002
    Assignee: Aixtron Aktiengesellschaft
    Inventor: Peter Frijlink
  • Patent number: 6248666
    Abstract: A process of manufacturing a semiconductor device with a double-recessed gate field effect transistor, comprising the formation, on a substrate (1), of an active layer (3) of a semiconductor material and a first dielectric layer (D1), and further comprising the steps of: forming a second dielectric layer (R), forming an aperture (A0) in the second dielectric layer (R), then a first opening (A1) in the first dielectric layer (D1) having a same first width, while forming a second opening (A2) in the second dielectric layer having a second width larger than the first width, and then etching a preliminary recess (A4) in the subjacent semiconductor layer through said first opening (A1) having said first width, enlarging said first opening (A1) in the first dielectric layer (D1) to form a third opening (A3) having a third width larger than the second width, and then etching the semiconductor layer through said preliminary recess (A4) to form a deeper central recess (A6) having substantially said first width while
    Type: Grant
    Filed: February 1, 1999
    Date of Patent: June 19, 2001
    Assignee: U.S. Philips Corporation
    Inventors: Peter Frijlink, Jean-Luc Oszustowicz
  • Patent number: 5457727
    Abstract: A device for processing a measured signal corresponding to the intensity reflected, as a function of the glancing angle (.theta.) at an X-ray wavelength (.lambda..sub.RX), by a real multi-layer structure stacked on a substrate (100), which layers exhibit small differences as regards refractive index at their interfaces, transforms the function (f(.theta.)), corresponding to the reflected intensity signal measured as a function of the glancing angle (.theta.) in a range of glancing angles which is bounded by minimum and maximum angular values .theta..sub.min -.theta..sub.max, into a function (F(d)) corresponding to the intensity signal formulated as a function of the depth (d) within the real multi-layer structure, the function (F(d)) obtained enabling a direct representation to be formed of the depth of each interface (d.sub.1, d.sub.2, . . . d.sub.n) of the real structure, and of the associated reflected intensities.
    Type: Grant
    Filed: June 17, 1993
    Date of Patent: October 10, 1995
    Assignee: U.S. Philips Corporation
    Inventor: Peter Frijlink
  • Patent number: 5056555
    Abstract: A first nozzle is connected to a space to be protected from excess pressure. A valve member releaseably seals the first nozzle. A second nozzle is coupled to an adjustable vacuum source for applying a predetermined vacuum level to the valve member to create a force against the member to seal the first nozzle. Seals are between the first and second nozzles and the member which couple the nozzles when the member disengages from the seals. The member disengages from the seals when the force on the member imposed by gas in the space being protected exceeds the force on the member created by the difference between ambient atmospheric pressure and the vacuum source pressure.
    Type: Grant
    Filed: June 22, 1990
    Date of Patent: October 15, 1991
    Assignee: U.S. Philips Corporation
    Inventor: Peter Frijlink
  • Patent number: 5027746
    Abstract: An epitaxial growth reactor for processing wafers (1) of a semiconductor material by exposing it to a reactive gas flow. A wall (8) positioned at a slight distance from the wafer or group of wafers which is exposed to the reactive gas in a double wall, with a very narrow space (34) between the two walls, and this space is filled with a mixture whose composition can be varied and, consequently, the thermal conductivity can be adjusted.The mixture used is a hydrogen/argon mixture, the proportion of each of these gasses in the mixture being adjustable.The interior wall (8) of the double wall is a quartz plate and the exterior wall (9) is made of metal. Relevant FIG.: 1.
    Type: Grant
    Filed: March 21, 1989
    Date of Patent: July 2, 1991
    Assignee: U.S. Philips Corporation
    Inventor: Peter Frijlink
  • Patent number: 4976217
    Abstract: An epitaxy reactor of the type having a planetary platform for semiconductor wafers. At the periphery of this planetary support (4), a baffle plate (17) for gas distribution is disposed, which is provided with regularly distributed holes (12).According to the invention, this baffle plate comprises two cylinders or quasi cylinders, i.e. an upper cylinder (17) and a lower cylinder (3) sliding one into the other and forming parts of the same conduit having the form of a passage (16) surrounding the platform, the other parts (18) of this conduit acting as a spring, which tends to cause the upper cylinder (17) to rise with respect to the lower cylinder (3) bearing on the platform.
    Type: Grant
    Filed: September 26, 1989
    Date of Patent: December 11, 1990
    Assignee: U.S. Philips Corporation
    Inventor: Peter Frijlink