Patents by Inventor Peter G. Newman

Peter G. Newman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240086595
    Abstract: The present application relates to a system comprising a processor configured to execute a digital system model based on simulated conditions to generate simulated data. The processor may also be configured to train a surrogate model using at least the simulated data to approximate the digital system model of the system and generate, using the trained surrogate model, estimated values for conditions or parameters of the systems based on operational data, wherein the operational data includes sensor data or in-service data from the system. Further, the processor may be configured to execute the digital system model of the system to generate simulation data based on the operational data and the estimated values or parameters generated by the surrogate model and synchronize or update a digital twin of the system based on the simulation data, wherein the digital twin represents a state or condition of the system.
    Type: Application
    Filed: September 13, 2022
    Publication date: March 14, 2024
    Inventors: Liessman E. Sturlaugson, Peter G. Rhodes, Daniel M. Newman
  • Patent number: 5898210
    Abstract: A Schottky diode having a series of stacked layers starting with a conventional substrate having a semi-insulating GaAs layer and an un-doped GaAs buffer layer. An n-type Si--GaAs channel layer is grown on the GaAs buffer layer. A low-temperature-grown GaAs barrier layer covers the center portion of the upper surface of the n-type channel layer. The Schottky diode comprises two terminals. One diode terminal comprises a ohmic contact deposited on the upper surface of the channel layer. This ohmic contact, which is ring-shaped, encircles the barrier layer. The other diode terminal includes a metal layer that forms a Schottky contact with the upper surface of the barrier layer. The Ga-to-As ratio in the low-temperature-grown GaAs barrier layer is adjusted so that the barrier layer contains a sufficient number of free electrons to support current flow for bias voltages above the Schottky barrier height.
    Type: Grant
    Filed: June 14, 1996
    Date of Patent: April 27, 1999
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Weiyu Han, Peter G. Newman