Abstract: Multi-dimensional data routing fabric simultaneously transfers multiple data packets between data processing components. Data packets are transported by arrays of data routing junctions dispersed along multiple routing dimensions. Data routing junctions are interconnected along each of routing dimensions with a mesh of data routing lines. Data transfers are accomplished by source components launching data packets into the multi-dimensional data routing fabric, and destination components receiving the routed data packets from the fabric. Each packet is guided by a chain of adjacent data routing junctions to converge on its destination. Individual data routing junctions along the packet's path make routing decisions by comparing the current location and direction of movement of the packet to the location of its destination. Based on the results of these comparisons, data packets are passed straight through to the next junction ahead, or are turned to an adjacent junction to the side of the current path.

Abstract: In a node failure detection technique at least one supervisory data processing node periodically transmits a receipt acknowledge data packet to each other data processing node. The supervisory data processing node determines a data processing node has failed upon failure to receive a return acknowledge data packet. This acknowledge data packet preferably includes health data concerning its current health operating status. The supervisory data processing node sends a reset data packet to any failed data processing node determined. If the reset does not return the data processing node to normal operation, then routing data at neighboring data processing nodes is altered to route data packets around the failed node.

Abstract: The datapipe routing bridge is composed of three building blocks, transmitter, bridge and receiver. The bridge component provides high levels of connectivity between multiple digital signal processors without paying the penalties usually associated with inter-processor connections. The individual digital signal processors are connected with unidirectional point-to-point links from a bridge terminal on one digital signal processor to a bridge terminal on another digital signal processor. A real-time comparison of the packet header information with direction identification codes (IDs) stored inside the bridge routes individual data transfer packets arriving at the bridge into the local processor, repeated out to the next processor or simultaneously absorbed and repeated.

Abstract: In a network of digital signal processor nodes connected in a peer-to-peer relationship, a data packet sent to a node causes a return transmission from that node. The requester digital signal processor sends a data packet to a target digital signal processor. Upon arrival at the target digital signal processor, its receiver drives the arriving request packet into an I/O memory and triggers a transmitter interrupt. Next, the pull interrupt causes the transmitter to execute on a next packet boundary the pull request packet. Finally, the execution of the pull request causes the transmitter to pull a portion of the local I/O memory and send it back to the requester digital signal processor. The same physical portion of the I/O memory is overlaid with two logical uses, a receiver channel and a transmitter code block.

Abstract: In a network of digital signal processor nodes connected in a peer-to-peer relationship, a data packet sent to a node causes a return transmission from that node. The requester digital signal processor sends a data packet to a target digital signal processor. Upon arrival at the target digital signal processor, its receiver drives the arriving request packet into an I/O memory and triggers a transmitter interrupt. Next, the pull interrupt causes the transmitter to execute on a next packet boundary the pull request packet. Finally, the execution of the pull request causes the transmitter to pull a portion of the local I/O memory and send it back to the requester digital signal processor. The same physical portion of the I/O memory is overlaid with two logical uses, a receiver channel and a transmitter code block.

Abstract: The datapipe routing bridge is composed of three building blocks, transmitter, bridge and receiver. The bridge component provides high levels of connectivity between multiple digital signal processors without paying the penalties usually associated with inter-processor connections. The individual digital signal processors are connected with unidirectional point-to-point links from a bridge terminal on one digital signal processor to a bridge terminal on another digital signal processor. A real-time comparison of the packet header information with direction identification codes (IDs) stored inside the bridge routes individual data transfer packets arriving at the bridge into the local processor, repeated out to the next processor or simultaneously absorbed and repeated.

Abstract: In a node failure detection technique at least one supervisory data processing node periodically transmits a receipt acknowledge data packet to each other data processing node. The supervisory data processing node determines a data processing node has failed upon failure to receive a return acknowledge data packet. This acknowledge data packet preferably includes health data concerning its current health operating status. The supervisory data processing node sends a reset data packet to any failed data processing node determined. If the reset does not return the data processing node to normal operation, then routing data at neighboring data processing nodes is altered to route data packets around the failed node.