Abstract: A circuit is disclosed with an external coupling port for coupling to an external antenna, for example. The circuit has an FDD receive path including a narrowband passband filter. The circuit has a TDD receive path bypassing the narrowband passband filter but relying on a same amplifier. The circuit also has an FDD transmit path including a narrowband passband filter. The circuit has a TDD transmit path bypassing the narrowband passband filter of the FDD transmit path but relying on a same transmit amplifier. A switching configuration allows the circuit to operate in TDD mode, alternating between the TDD receive path and the TDD transmit path and in the FDD mode wherein the FDD transmit and receive paths are simultaneously coupled to the external coupling port.

Abstract: A circuit is disclosed with an external coupling port for coupling to an external antenna, for example. The circuit has an FDD receive path including a narrowband passband filter. The circuit has a TDD receive path bypassing the narrowband passband filter but relying on a same amplifier. The circuit also has an FDD transmit path including a narrowband passband filter. The circuit has a TDD transmit path bypassing the narrowband passband filter of the FDD transmit path but relying on a same transmit amplifier. A switching configuration allows the circuit to operate in TDD mode, alternating between the TDD receive path and the TDD transmit path and in the FDD mode wherein the FDD transmit and receive paths are simultaneously coupled to the external coupling port.

Abstract: A circuit is disclosed with an external coupling port for coupling to an external antenna, for example. The circuit has an FDD receive path including a narrowband passband filter. The circuit has a TDD receive path bypassing the narrowband passband filter but relying on a same amplifier. The circuit also has an FDD transmit path including a narrowband passband filter. The circuit has a TDD transmit path bypassing the narrowband passband filter of the FDD transmit path but relying on a same transmit amplifier. A switching configuration allows the circuit to operate in TDD mode, alternating between the TDD receive path and the TDD transmit path and in the FDD mode wherein the FDD transmit and receive paths are simultaneously coupled to the external coupling port.

Abstract: A circuit is disclosed with an external coupling port for coupling to an external antenna, for example. The circuit has an FDD receive path including a narrowband passband filter. The circuit has a TDD receive path bypassing the narrowband passband filter but relying on a same amplifier. The circuit also has an FDD transmit path including a narrowband passband filter. The circuit has a TDD transmit path bypassing the narrowband passband filter of the FDD transmit path but relying on a same transmit amplifier. A switching configuration allows the circuit to operate in TDD mode, alternating between the TDD receive path and the TDD transmit path and in the FDD mode wherein the FDD transmit and receive paths are simultaneously coupled to the external coupling port.

Abstract: In a metal-oxide semiconductor device including first and second source/drain regions of a first conductivity type formed in a semiconductor layer of a second conductivity type proximate an upper surface of the semiconductor layer, a drift region formed in the semiconductor layer proximate the upper surface of the semiconductor layer and at least partially between the first and second source/drain regions, an insulating layer formed on at least a portion of the upper surface of the semiconductor layer, and a gate formed on the insulating layer and at least partially between the first and second source/drain regions, a method for controlling an amount of hot carrier injection degradation in the device includes the steps of: forming a shielding structure on the insulating layer above at least a portion of the drift region and substantially between the gate and the second source/drain region; and adjusting an amount of coverage of the shielding structure over an upper surface of the drift region so as to minimiz

Abstract: A microelectromechanical microwave vacuum tube device is disclosed. The device consists of a cathode formed on a substrate, the cathode comprising electron emitters. A cathode emission control grid is also attached to the device substrate. The device further includes an output structure where amplified microwave power is removed from the device. In the device, the cathode surface and the grid surface are substantially parallel to each other and substantially perpendicular to the substrate. One of either the cathode, the grid, or both the cathode and the grid, are attached to the device substrate by one or more flexural members. The device further comprises an anode that is substantially parallel to the cathode surface and the grid surface.

Abstract: The present invention provides a process for manufacturing a semiconductor device that can be incorporated into an integrated circuit. The method includes, forming a first doped layer of isotopically enriched silicon over a foundational substrate, forming a second layer of an isotopically enriched semiconductor material silicon over the first doped layer, and constructing active devices on the second layer. The device includes a first doped layer of an isotopically enriched semiconductor material and a second layer of an isotopically enriched semiconductor material located over the first doped layer, and active devices located on the second layer.

Abstract: An MOS device is formed including a semiconductor layer of a first conductivity type, and first and second source/drain regions of a second conductivity type formed in the semiconductor layer proximate an upper surface of the semiconductor layer, the first and second source/drain regions being spaced apart relative to one another. A drift region is formed in the semiconductor layer proximate the upper surface of the semiconductor layer and at least partially between the first and second source/drain regions. An insulating layer is formed on at least a portion of the upper surface of the semiconductor layer and above at least a portion of the drift region. A gate is formed on the insulating layer and at least partially between the first and second source/drain regions. The MOS device further includes a shielding structure formed on the insulating layer above at least a portion of the drift region.

Abstract: An MOS device comprises a semiconductor layer of a first conductivity type and first and second source/drain regions of a second conductivity type formed in the semiconductor layer proximate an upper surface of the semiconductor layer. The first and second source/drain regions are spaced laterally apart relative to one another and are formed in an active region of the semiconductor layer. The MOS device further comprises a gate formed above the semiconductor layer proximate the upper surface of the semiconductor layer and at least partially between the first and second source/drain regions. The gate is configured such that a dimension of the gate, defined substantially parallel to at least one of the first and second source/drain regions, is confined to be substantially within the active region of the device. An isolation structure is formed in the semiconductor layer, the isolation structure being configured to substantially isolate the first source/drain region from the second source/drain region.