Patents by Inventor Peter Grayson
Peter Grayson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11194494Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of streams. By restricting the host to have a minimum write size, the data transfer speed to RAM2, RAM1, and the storage unit can be optimized. A temporary buffer is utilized within the RAM1 to update parity data for the corresponding commands. The parity data is updated in the RAM1 and written to the RAM2 in the corresponding stream. The parity data may be copied from the RAM2 to the RAM1 to update the parity data in the temporary buffer when commands are received to write data to corresponding streams. As the parity data is updated, the corresponding command is simultaneously written to the corresponding stream.Type: GrantFiled: April 24, 2020Date of Patent: December 7, 2021Assignee: Western Digital Technologies, Inc.Inventors: Sergey Anatolievich Gorobets, Daniel L. Helmick, Peter Grayson
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Publication number: 20210373769Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of streams. When a write command is received to write data to a stream, change log data is generated and stored in the RAM1, the previous delta data for the stream is copied from the RAM2 to the RAM1 to be updated with the change log data, and the updated delta data is copied to the RAM2. The delta data stored in the RAM2 is copied to the storage unit periodically. The controller tracks which delta data has been copied to the RAM2 and to the storage unit. During a power failure, the delta data and the change log data are copied from the RAM1 or the RAM2 to the storage unit.Type: ApplicationFiled: May 26, 2020Publication date: December 2, 2021Applicant: Western Digital Technologies, Inc.Inventors: Daniel L. HELMICK, Peter GRAYSON
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Publication number: 20210373802Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of zones. When a write command is received to write data to a zone, change log data is generated and stored in the RAM1, the previous delta data for the zone is copied from the RAM2 to the RAM1 to be updated with the change log data, and the updated delta data is copied to the RAM2. The delta data stored in the RAM2 is copied to the storage unit periodically. The controller tracks which delta data has been copied to the RAM2 and to the storage unit. During a power failure, the delta data and the change log data are copied from the RAM1 or the RAM2 to the storage unit.Type: ApplicationFiled: May 26, 2020Publication date: December 2, 2021Applicant: Western Digital Technologies, Inc.Inventors: Daniel L. HELMICK, Peter GRAYSON
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Publication number: 20210374003Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of zones. A first command to write data to a first zone is received, first XOR data is generated in the RAM1, and the data of the first command is written to the first zone. When a second command to write data to a second zone is received, the generated first XOR data is copied from the RAM1 to the RAM2, and second XOR data for the second zone is copied from the RAM2 to the RAM1. The second XOR data is updated with the second command, and the data of the second command is written to the second zone. The updated second XOR data is copied from the RAM1 to the RAM2.Type: ApplicationFiled: May 27, 2020Publication date: December 2, 2021Applicant: Western Digital Technologies, Inc.Inventors: Daniel L. HELMICK, Liam PARKER, Alan D. BENNETT, Peter GRAYSON, Sergey Anatolievich GOROBETS
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Publication number: 20210333997Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of streams. By restricting the host to have a minimum write size, the data transfer speed to RAM2, RAM1, and the storage unit can be optimized. A temporary buffer is utilized within the RAM1 to update parity data for the corresponding commands. The parity data is updated in the RAM1 and written to the RAM2 in the corresponding stream. The parity data may be copied from the RAM2 to the RAM1 to update the parity data in the temporary buffer when commands are received to write data to corresponding streams. As the parity data is updated, the corresponding command is simultaneously written to the corresponding stream.Type: ApplicationFiled: April 24, 2020Publication date: October 28, 2021Applicant: Western Digital Technologies, Inc.Inventors: Sergey Anatolievich GOROBETS, Daniel L. HELMICK, Peter GRAYSON
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Publication number: 20210334041Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller and a storage unit divided into a plurality of zones. The storage unit comprises a plurality of dies, where each die comprises two planes. One erase block from each plane of a die is selected for zone formation. Each erase block comprises a plurality of wordlines. A zone comprises one or two dies dedicated to storing parity data and a plurality of dies dedicated to storing user data. The zone further comprises space devoted for controller metadata. The storage device restricts a host device to send write commands in a minimum write size to increase programming efficiency. The minimum write size equals one wordline from one erase block from each plane of each die in the zone dedicated to storing user data minus the space dedicated to metadata.Type: ApplicationFiled: April 24, 2020Publication date: October 28, 2021Applicant: Western Digital Technologies, Inc.Inventors: Alan D. BENNETT, Daniel L. HELMICK, Liam PARKER, Sergey Anatolievich GOROBETS, Peter GRAYSON
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Publication number: 20210333996Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of streams. A first command to write data to a first stream is received, first parity data for the first command is generated in the RAM1, and the data of the first command is written to the first stream. When a second command to write data to a second stream is received, the generated first parity data is copied from the RAM1 to a parking section in the storage unit, and second parity data associated with the second stream is copied from the parking section to the RAM1. The second parity data is updated in the RAM1 with the data of the second command and copied to the parking section.Type: ApplicationFiled: April 24, 2020Publication date: October 28, 2021Applicant: Western Digital Technologies, Inc.Inventors: Sergey Anatolievich GOROBETS, Peter GRAYSON, Daniel L. HELMICK, Liam PARKER
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Publication number: 20210334031Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of zones. A first command to write data to a first zone is received, first parity data for the first command is generated in the RAM1, and the data of the first command is written to the first zone. When a second command to write data to a second zone is received, the generated first parity data is copied from the RAM1 to a parking section in the storage unit, and second parity data associated with the second zone is copied from the parking section to the RAM1. The second parity data is then updated in the RAM1 with the data of the second command and copied to the parking section.Type: ApplicationFiled: April 24, 2020Publication date: October 28, 2021Applicant: Western Digital Technologies, Inc.Inventors: Peter GRAYSON, Daniel L. HELMICK, Liam PARKER, Sergey Anatolievich GOROBETS
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Publication number: 20210334201Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller and a storage unit divided into a plurality of streams. The storage unit comprises a plurality of dies, where each die comprises two planes. One erase block from each plane of a die is selected for stream formation. Each erase block comprises a plurality of wordlines. A stream comprises one or two dies dedicated to storing parity data and a plurality of dies dedicated to storing user data. The stream further comprises space devoted for controller metadata. The storage device restricts a host device to send write commands in a minimum write size to increase programming efficiency. The minimum write size equals one wordline from one erase block from each plane of each die in the stream dedicated to storing user data minus the space dedicated to metadata.Type: ApplicationFiled: April 24, 2020Publication date: October 28, 2021Applicant: Western Digital Technologies, Inc.Inventors: Alan D. BENNETT, Daniel L. HELMICK, Liam PARKER, Sergey Anatolievich GOROBETS, Peter GRAYSON
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Publication number: 20210334161Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of zones. By restricting the host to have a minimum write size, the data transfer speed to RAM2, RAM1, and the storage unit can be optimized. A temporary buffer is utilized within the RAM1 to update parity data for the corresponding commands. The parity data is updated in the RAM1 and written to the RAM2 in the corresponding zone. The parity data may be copied from the RAM2 to the RAM1 to update the parity data in the temporary buffer when commands are received to write data to corresponding zones. As the parity data is updated, the corresponding command is simultaneously written to the corresponding zone.Type: ApplicationFiled: June 16, 2021Publication date: October 28, 2021Applicant: Western Digital Technologies, Inc.Inventors: Daniel L. HELMICK, Peter GRAYSON, Sergey Anatolievich GOROBETS
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Patent number: 11138066Abstract: The A storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of streams. A first command to write data to a first stream is received, first XOR data is generated in the RAM1, and the data of the first command is written to the first stream. When a second command to write data to a second stream is received, the generated first XOR data is copied from the RAM1 to the RAM2, and second XOR data for the second stream is copied from the RAM2 to the RAM1. The second XOR data is updated with the second command, and the data of the second command is written to the second stream. The updated second XOR data is copied from the RAM1 to the RAM2.Type: GrantFiled: May 27, 2020Date of Patent: October 5, 2021Assignee: Western Digital Technologies, Inc.Inventors: Sergey Anatolievich Gorobets, Daniel L. Helmick, Liam Parker, Alan D. Bennett, Peter Grayson
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Patent number: 11055176Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of zones. By restricting the host to have a minimum write size, the data transfer speed to RAM2, RAM1, and the storage unit can be optimized. A temporary buffer is utilized within the RAM1 to update parity data for the corresponding commands. The parity data is updated in the RAM1 and written to the RAM2 in the corresponding zone. The parity data may be copied from the RAM2 to the RAM1 to update the parity data in the temporary buffer when commands are received to write data to corresponding zones. As the parity data is updated, the corresponding command is simultaneously written to the corresponding zone.Type: GrantFiled: April 24, 2020Date of Patent: July 6, 2021Assignee: Western Digital Technologies, Inc.Inventors: Daniel L. Helmick, Peter Grayson, Sergey Anatolievich Gorobets
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Publication number: 20210089217Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller and a media unit. The capacity of the media unit is divided into a plurality of zones. The controller is configured to make informed use of errors by update zone metadata to indicate one or more first logical block addresses were skipped and to indicate the next valid logical block address is available to store data. The controller is further configured to update zone metadata to recommend to the host device to reset one or more full zones, to recommend to the host device to transition one or more open zones to a full state, to alert the host device that one or more open zones have been transitioned to the full state, and to notify the host device of the writeable zone capacity of each of the plurality of zones.Type: ApplicationFiled: December 27, 2019Publication date: March 25, 2021Inventors: Matias BJØRLING, Horst-Christoph Georg HELLWIG, David LANDSMAN, Daniel L. HELMICK, Liam PARKER, Alan D. BENNETT, Peter GRAYSON, Judah Gamliel HAHN
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Publication number: 20200409601Abstract: The present disclosure generally relates to methods of operating storage devices. A controller of the storage device retrieves data of a first command a first time and performs a first pass programming of the data of the first command to a first page in a first erase block. Data of a second command is then retrieved a first time by the controller, and the controller performs a first pass programming of the data of the second command to a second page in the first erase block. Upon retrieving the second command, the controller completes the processing of the first command by retrieving the data of the first command a second time and writing the data of the first command to the first page by performing a second pass programming. The data of the first command is stored in the host device until the second pass programming is complete.Type: ApplicationFiled: November 26, 2019Publication date: December 31, 2020Inventors: Daniel L. HELMICK, Peter GRAYSON
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Publication number: 20200409589Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller and a media unit. The capacity of the media unit is divided into a plurality of zones. The media unit comprises a plurality of dies, and each of the plurality of dies comprising a plurality of erase blocks. The controller is configured to compare an estimated age of a first available erase block in each of the plurality of dies to one another and select one or more of the first available erase blocks from one or more dies of the plurality of dies based on the estimated ages to form a first zone. At least one first available erase block from at least one die of the plurality of die is excluded from the first zone.Type: ApplicationFiled: December 4, 2019Publication date: December 31, 2020Inventors: Alan D. BENNETT, Liam PARKER, Daniel L. HELMICK, Sergey Anatolievich GOROBETS, Peter GRAYSON
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Publication number: 20200341688Abstract: The present disclosure generally presents a method and apparatus to provide a bounded latency, where a device would report “non-service” of a command at the defined system level timeout or earlier if the device was unable to successfully return the data to the host.Type: ApplicationFiled: July 9, 2020Publication date: October 29, 2020Inventors: Neil HUTCHISON, Peter GRAYSON, Xinde HU, Daniel L. HELMICK, Rodney BRITTNER
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Patent number: 10732900Abstract: The present disclosure generally presents a method and apparatus to provide a bounded latency, where a device would report “non-service” of a command at the defined system level timeout or earlier if the device was unable to successfully return the data to the host.Type: GrantFiled: October 24, 2018Date of Patent: August 4, 2020Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Neil Hutchison, Peter Grayson, Xinde Hu, Daniel Helmick, Rodney Brittner
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Publication number: 20200133567Abstract: The present disclosure generally presents a method and apparatus to provide a bounded latency, where a device would report “non-service” of a command at the defined system level timeout or earlier if the device was unable to successfully return the data to the host.Type: ApplicationFiled: October 24, 2018Publication date: April 30, 2020Inventors: Neil HUTCHISON, Peter GRAYSON, Xinde HU, Daniel HELMICK, Rodney BRITTNER
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Patent number: D453420Type: GrantFiled: April 25, 2001Date of Patent: February 12, 2002Assignee: Mars U.K. LimitedInventors: Jeremy Offer, Peter Grayson, Grant Charles Taylor
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Patent number: D465930Type: GrantFiled: April 25, 2001Date of Patent: November 26, 2002Assignee: Mars U.K. LimitedInventors: Jeremy Offer, Peter Grayson, Grant Charles Taylor