Patents by Inventor Peter Grombach

Peter Grombach has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8233252
    Abstract: An ESD protection circuit is provided having a first field-effect transistor, which has a first drain terminal, a first source terminal and a first control terminal, and having an input network which, in the event that a first voltage present between the first drain terminal and the first source terminal crosses a threshold value, alters a second voltage that appears between the first control terminal and the first source terminal. The input network contains a second field-effect transistor, complementary to the first field-effect transistor, having a second drain terminal, a second source terminal and a second control terminal, wherein the first drain terminal is connected to the second source terminal and, through a first resistance, to the second control terminal, and the second drain terminal is connected to the first control terminal and, through a second resistance, to the first source terminal.
    Type: Grant
    Filed: March 16, 2006
    Date of Patent: July 31, 2012
    Assignee: Atmel Corporation
    Inventors: Peter Grombach, Manfred Klaussner
  • Patent number: 7848070
    Abstract: An electrostatic discharge (ESD) protection structure is disclosed. The ESD protection structure includes an active device. The active device includes a plurality of drains. Each of the drains has a contact row and at least one body contact row. The at least one body contact row is located on the active device in a manner to reduce the amount of voltage required for triggering the ESD protection structure.
    Type: Grant
    Filed: July 21, 2008
    Date of Patent: December 7, 2010
    Assignee: Atmel Corporation
    Inventors: Stefan Schwantes, Michael Graf, Volker Dudek, Gayle W. Miller, Jr., Irwin Rathbun, Peter Grombach, Manfred Klaussner
  • Publication number: 20080278874
    Abstract: An electrostatic discharge (ESD) protection structure is disclosed. The ESD protection structure includes an active device. The active device includes a plurality of drains. Each of the drains has a contact row and at least one body contact row. The at least one body contact row is located on the active device in a manner to reduce the amount of voltage required for triggering the ESD protection structure.
    Type: Application
    Filed: July 21, 2008
    Publication date: November 13, 2008
    Inventors: Stefan Schwantes, Michael Graf, Volker Dudek, Gayle W. Miller, JR., Irwin Rathbun, Peter Grombach, Manfred Klaussner
  • Patent number: 7402846
    Abstract: An electrostatic discharge (ESD) protection structure is disclosed. The ESD protection structure includes an active device. The active device includes a plurality of drains. Each of the drains has a contact row and at least one body contact row. The at least one body contact row is located on the active device in a manner to reduce the amount of voltage required for triggering the ESD protection structure.
    Type: Grant
    Filed: October 20, 2005
    Date of Patent: July 22, 2008
    Assignee: Atmel Corporation
    Inventors: Stefan Schwantes, Michael Graf, Volker Dudek, Gayle W. Miller, Jr., Irwin Rathbun, Peter Grombach, Manfred Klaussner
  • Publication number: 20080006847
    Abstract: A semiconductor protective structure suitable for electrostatic discharge with a field-effect transistor, whose source forms an emitter, whose body forms a base, and whose drain forms a collector of a bipolar transistor. A plurality of drain regions are formed within a body region of the field-effect transistor, and the drain regions are connected to one another by a conductor.
    Type: Application
    Filed: June 20, 2007
    Publication date: January 10, 2008
    Inventors: Peter Grombach, Andre Heid, Manfred Klaussner, Stefan Schwantes
  • Publication number: 20070120190
    Abstract: An electrostatic discharge (ESD) protection structure is disclosed. The ESD protection structure comprises an active device. The active device includes a plurality of drains. Each of the drains has a contact row and at least one body contact row. The at least one body contact row is located on the active device in a manner to reduce the amount of voltage required for triggering the ESD protection structure. A system and method in accordance with the present invention utilizes a LDNMOS transistor as ESD protection element with optimised substrate contacts. The ratio of substrate contact rows to drain contact rows is smaller than one in order to reduce the triggering voltage of the inherent bipolar transistor.
    Type: Application
    Filed: October 20, 2005
    Publication date: May 31, 2007
    Inventors: Stefan Schwantes, Michael Graf, Volker Dudek, Gayle Miller, Irwin Rathbun, Peter Grombach, Manfred Klaussner
  • Publication number: 20060220138
    Abstract: An ESD protection circuit includes semiconductor structures as basic elements whose electrical conductivity changes in a breakdown or avalanche manner in the presence of an applied voltage which exceeds a threshold value. The ESD protection circuit has a matrix of basic elements in which a desired current capacity can be set by specifying a number of basic elements in each row, and a desired voltage capacity can be set by specifying a number of rows.
    Type: Application
    Filed: March 16, 2006
    Publication date: October 5, 2006
    Applicant: ATMEL GERMANY GMBH
    Inventors: Volker Dudek, Michael Graf, Peter Grombach, Manfred Klaussner
  • Publication number: 20060209479
    Abstract: An ESD protection circuit is provided having a first field-effect transistor, which has a first drain terminal, a first source terminal and a first control terminal, and having an input network which, in the event that a first voltage present between the first drain terminal and the first source terminal crosses a threshold value, alters a second voltage that appears between the first control terminal and the first source terminal. The input network contains a second field-effect transistor, complementary to the first field-effect transistor, having a second drain terminal, a second source terminal and a second control terminal, wherein the first drain terminal is connected to the second source terminal and, through a first resistance, to the second control terminal, and the second drain terminal is connected to the first control terminal and, through a second resistance, to the first source terminal.
    Type: Application
    Filed: March 16, 2006
    Publication date: September 21, 2006
    Inventors: Peter Grombach, Manfred Klaussner