Patents by Inventor Peter Harris Robert Popplewell
Peter Harris Robert Popplewell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9588529Abstract: Circuits and methodologies related to high-voltage tolerant regulators are disclosed. In some implementations, a voltage regulator can be configured to be capable of being in a regulating state and a bypass state. In the regulating state, an input voltage greater than a selected value can be regulated so as to yield a desired output voltage such as a substantially constant voltage. In the bypass state, an input voltage at or less than the selected value can be regulated so as to yield an output voltage that substantially tracks the input voltage. Such a capability of switching between two modes can provide advantageous features such as reducing the likelihood of damage in a powered circuit due to high input voltage, and extending the operating duration of a power source such as a rechargeable battery. Also disclosed are examples of how the foregoing features can be implemented in different products and methods of operation and fabrication.Type: GrantFiled: September 2, 2011Date of Patent: March 7, 2017Assignee: SKYWORKS SOLUTIONS, INC.Inventors: Florinel G. Balteanu, Jakub F. Pingot, Peter Harris Robert Popplewell
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Publication number: 20160248449Abstract: Apparatus and methods for negative voltage generation with reduced clock feed-through are provided. In certain configurations, a method of negative voltage generation in a wireless device is provided. The method includes generating a regulated voltage from a battery voltage using a voltage regulator, powering a first charge pump and a second charge pump using the regulated voltage, generating a first negative voltage based on timing of a first clock phase using the first charge pump, generating a second negative voltage based on the first negative voltage and on timing of a second clock phase using the second charge pump, and generating the first clock phase and the second clock phase with different phases using a poly-phase oscillator such that the first charge pump and the second charge pump draw from the regulated voltage at different points in time.Type: ApplicationFiled: May 2, 2016Publication date: August 25, 2016Inventors: Peter Harris Robert Popplewell, Jakub F. Pingot, Florinel G. Balteanu
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Patent number: 9425833Abstract: Implementations of radio frequency switch controllers within the scope of the appended claims are configured to reduce the impact of the clock signal induced spurs. In particular, implementations of switch controllers described herein include a poly-phase clocking scheme, as opposed to a single phase to clock the charge pump stages of an negative voltage generator. In some implementations poly-phase clocking schemes reduce the clock signal induced spurs and may preclude the need for additional on-chip or off-chip decoupling capacitors that add to the cost and physical size of a complete front end module solution.Type: GrantFiled: June 5, 2015Date of Patent: August 23, 2016Assignee: SKYWORKS SOLUTIONS, INC.Inventors: Peter Harris Robert Popplewell, Jakub F. Pingot, Florinel G. Balteanu
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Patent number: 9391648Abstract: Implementations of radio frequency switch controllers within the scope of the appended claims are configured to reduce the impact of the clock signal induced spurs. In particular, implementations of switch controllers described herein include a poly-phase clocking scheme, as opposed to a single phase to clock the charge pump stages of an negative voltage generator. In some implementations poly-phase clocking schemes reduce the clock signal induced spurs and may preclude the need for additional on-chip or off-chip decoupling capacitors that add to the cost and physical size of a complete front end module solution.Type: GrantFiled: June 5, 2015Date of Patent: July 12, 2016Assignee: SKYWORKS SOLUTIONS, INC.Inventors: Peter Harris Robert Popplewell, Jakub F. Pingot, Florinel G. Balteanu
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Publication number: 20160043644Abstract: Apparatus and methods for bypassing an inductor of a voltage converter are provided. In one embodiment, a voltage converter includes an inductor and a bypass circuit that selectively bypasses the inductor based on a state of a bypass control signal. The inductor includes including a first end electrically connected to a first node and a second end electrically connected to a second node. The bypass circuit includes a first p-type field effect transistor and a second p-type field effect transistor electrically connected in series between the first node and the second node. The first p-type field effect transistor includes a body electrically connected to a first voltage, and the second p-type field effect transistor includes a body electrically connected to a second voltage greater than the first voltage.Type: ApplicationFiled: October 22, 2015Publication date: February 11, 2016Inventors: Peter Harris Robert Popplewell, Jakub F. Pingot, Florinel G. Balteanu, Martin Wilson, Mark Tuckwell
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Publication number: 20160036389Abstract: A low frequency loss correction circuit that improves the efficiency of a power amplifier at near-DC low frequencies The low frequency loss correction circuit can include a signal error detection circuit configured to produce an error signal in response to detecting one or more frequency components of a tracking signal below a cutoff frequency that are substantially attenuated through a capacitive path. The low frequency loss correction circuit can include a drive circuit configured to convert the error signal into a low frequency correction signal, and provide the low frequency correction signal to a voltage supply line, the low frequency correction signal including at least some of the one or more frequency components of the tracking signal below a cutoff frequency that are substantially attenuated through the capacitive path.Type: ApplicationFiled: July 20, 2015Publication date: February 4, 2016Inventors: Florinel G. BALTEANU, Jose Alejandro MACEDO, Peter Harris Robert POPPLEWELL, Jakub F. PINGOT
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Publication number: 20150349809Abstract: Implementations of radio frequency switch controllers within the scope of the appended claims are configured to reduce the impact of the clock signal induced spurs. In particular, implementations of switch controllers described herein include a poly-phase clocking scheme, as opposed to a single phase to clock the charge pump stages of an negative voltage generator. In some implementations poly-phase clocking schemes reduce the clock signal induced spurs and may preclude the need for additional on-chip or off-chip decoupling capacitors that add to the cost and physical size of a complete front end module solution.Type: ApplicationFiled: June 5, 2015Publication date: December 3, 2015Inventors: Peter Harris Robert Popplewell, Jakub F. Pingot, Florinel G. Balteanu
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Publication number: 20150349837Abstract: Implementations of radio frequency switch controllers within the scope of the appended claims are configured to reduce the impact of the clock signal induced spurs. In particular, implementations of switch controllers described herein include a poly-phase clocking scheme, as opposed to a single phase to clock the charge pump stages of an negative voltage generator. In some implementations poly-phase clocking schemes reduce the clock signal induced spurs and may preclude the need for additional on-chip or off-chip decoupling capacitors that add to the cost and physical size of a complete front end module solution.Type: ApplicationFiled: June 5, 2015Publication date: December 3, 2015Inventors: Peter Harris Robert Popplewell, Jakub F. Pingot, Florinel G. Balteanu
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Patent number: 9197128Abstract: Apparatus and methods for voltage converter bypass circuits are provided. In one embodiment, a voltage conversion system includes a bypass circuit and a voltage converter including an inductor and a plurality of switches configured to control a current through the inductor. The bypass circuit includes a first p-type field effect transistor, a second p-type field effect transistor, a first n-type field effect transistor, and a second n-type field effect transistor. The first and second n-type field effect transistors are electrically in series between a first end and a second end of the inductor. Additionally, the first and second p-type field effect transistor transistors are electrically connected in series between the first end and the second end of the inductor.Type: GrantFiled: June 18, 2014Date of Patent: November 24, 2015Assignees: SKYWORKS SOLUTIONS, INC., SNAPTRACK, INC.Inventors: Peter Harris Robert Popplewell, Jakub F. Pingot, Florinel G. Balteanu, Martin Wilson, Mark Tuckwell
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Patent number: 9083455Abstract: Implementations of radio frequency switch controllers within the scope of the appended claims are configured to reduce the impact of the clock signal induced spurs. In particular, implementations of switch controllers described herein include a poly-phase clocking scheme, as opposed to a single phase to clock the charge pump stages of an negative voltage generator. In some implementations poly-phase clocking schemes reduce the clock signal induced spurs and may preclude the need for additional on-chip or off-chip decoupling capacitors that add to the cost and physical size of a complete front end module solution.Type: GrantFiled: August 29, 2012Date of Patent: July 14, 2015Assignee: Skyworks Solutions, Inc.Inventors: Peter Harris Robert Popplewell, Jakub F. Pingot, Florinel G. Balteanu
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Publication number: 20140300334Abstract: Apparatus and methods for voltage converter bypass circuits are provided. In one embodiment, a voltage conversion system includes a bypass circuit and a voltage converter including an inductor and a plurality of switches configured to control a current through the inductor. The bypass circuit includes a first p-type field effect transistor, a second p-type field effect transistor, a first n-type field effect transistor, and a second n-type field effect transistor. The first and second n-type field effect transistors are electrically in series between a first end and a second end of the inductor. Additionally, the first and second p-type field effect transistor transistors are electrically connected in series between the first end and the second end of the inductor.Type: ApplicationFiled: June 18, 2014Publication date: October 9, 2014Inventors: Peter Harris Robert Popplewell, Jakub F. Pingot, Florinel G. Balteanu, Martin Wilson, Mark Tuckwell
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Patent number: 8786371Abstract: Apparatus and methods for voltage converters are provided. In one embodiment, a voltage conversion system includes a bypass circuit and a voltage converter including an inductor and a plurality of switches configured to control a current through the inductor. The bypass circuit includes a first p-type field effect transistor (PFET), a second PFET, a first n-type field effect transistor (NFET), and a second NFET. The first and second NFET transistors and the first and second PFET transistors are electrically connected between a first end and a second end of the inductor such that a source of the first PFET transistor and a drain of the first NFET transistor are electrically connected to the first end of the inductor and such that a drain of the second PFET transistor and a source of the second NFET transistor are electrically connected to the second end of the inductor.Type: GrantFiled: November 7, 2012Date of Patent: July 22, 2014Assignees: Skyworks Solutions, Inc., Nujira LtdInventors: Peter Harris Robert Popplewell, Jakub F Pingot, Florinel G Balteanu, Martin Wilson, Mark Tuckwell
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Publication number: 20130052968Abstract: Implementations of radio frequency switch controllers within the scope of the appended claims are configured to reduce the impact of the clock signal induced spurs. In particular, implementations of switch controllers described herein include a poly-phase clocking scheme, as opposed to a single phase to clock the charge pump stages of an negative voltage generator. In some implementations poly-phase clocking schemes reduce the clock signal induced spurs and may preclude the need for additional on-chip or off-chip decoupling capacitors that add to the cost and physical size of a complete front end module solution.Type: ApplicationFiled: August 29, 2012Publication date: February 28, 2013Applicant: SKYWORKS SOLUTIONS, INC.Inventors: Peter Harris Robert Popplewell, Jakub F. Pingot, Florinel G. Balteanu
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Publication number: 20120077551Abstract: Circuits and methodologies related to high-voltage tolerant regulators are disclosed. In some implementations, a voltage regulator can be configured to be capable of being in a regulating state and a bypass state. In the regulating state, an input voltage greater than a selected value can be regulated so as to yield a desired output voltage such as a substantially constant voltage. In the bypass state, an input voltage at or less than the selected value can be regulated so as to yield an output voltage that substantially tracks the input voltage. Such a capability of switching between two modes can provide advantageous features such as reducing the likelihood of damage in a powered circuit due to high input voltage, and extending the operating duration of a power source such as a rechargeable battery. Also disclosed are examples of how the foregoing features can be implemented in different products and methods of operation and fabrication.Type: ApplicationFiled: September 2, 2011Publication date: March 29, 2012Applicant: Skyworks Solutions, Inc.Inventors: Florinel G. Balteanu, Jakub F. Pingot, Peter Harris Robert Popplewell