Abstract: Methods for fabricating an integrated circuit with a voltage regulator are provided. In some implementations, a method includes forming a primary regulator on a semiconductor substrate, including fabricating a switch, fabricating an amplifier for controlling the switch, and fabricating a voltage generator for biasing the amplifier to operate the primary regulator in a bypass mode or in a regulating mode. The method further includes forming an input terminal and an output terminal of the primary regulator on the semiconductor substrate, forming a secondary regulator on the substrate, forming an input terminal and an output terminal of the secondary regulator on the semiconductor substrate, and forming an electrical connection between the output terminal of the primary regulator and the input terminal of the secondary regulator.

Abstract: Voltage regulator circuits for wireless devices are provided. In some implementations, a transceiver module includes a transceiver circuit that generates a radio frequency (RF) signal, a power amplifier circuit that receives the RF signal and generates an amplified RF signal, and a voltage regulator circuit that receives an input voltage and provides a desired voltage to the power amplifier circuit. The voltage regulator circuit is operable in a regulation mode in which the desired voltage includes a regulated voltage and in a bypass mode in which the desired voltage includes a bypass voltage. The voltage regulator circuit includes a field-effect transistor (FET) electrically connected between the input voltage and the desired voltage, an amplifier that controls the FET, and a voltage generator that receives the input voltage and biases the amplifier.

Abstract: Apparatus and methods for voltage regulation are provided. In some implementations, a voltage regulator circuit includes a field-effect transistor including a source that receives a battery voltage from an input node and a drain coupled to an output node, an amplifier including an output coupled to a gate of the field-effect transistor, and a voltage generator that receives the battery voltage from the input node and provides a reference voltage and one or more bias voltages to the amplifier. The voltage generator controls the amplifier to operate the voltage regulator circuit in a regulation mode or in a bypass mode based on a voltage level of the battery voltage. The amplifier and the field-effect transistor regulate the battery voltage in the regulation mode to provide a regulated voltage at the output node, and the amplifier turns on the field-effect transistor in the bypass mode to provide a bypass voltage substantially equal to the battery voltage at the output node.

Abstract: A three column spinal fixation implant, including: an anterior cage configured to be disposed in an intervertebral space between adjacent vertebral bodies in a spine of a patient; an anterior plate coupled to the anterior cage; a pair of anterior screws coupled to the anterior cage and the anterior plate and extending posteriorly from the anterior cage and the anterior plate through a portion of one or more of the adjacent vertebral bodies and into or through posterior bony structures of the spine of the patient; a pair of anterior screws coupled to the anterior plate and extending posteriorly from the anterior plate through a portion of one or more of the adjacent vertebral bodies and into or through posterior bony structures of the spine of the patient; a plurality of posterior headbodies coupled to the anterior screws opposite the anterior cage and the anterior plate; and one or more connecting structures coupled to the plurality of posterior headbodies; wherein the three column spinal fixation implant pro

Abstract: In various exemplary embodiments, the present invention provides devices, implants, and methods for distracting and/or stabilizing a facet joint of the spine of a patient or other similar joint or bony structures, optionally including modifying the facet joint and implanting an implant in the facet joint so as to distract the foramen in order to reduce compression on nerve roots.

Abstract: Circuits and methodologies related to high-voltage tolerant regulators are disclosed. In some implementations, a voltage regulator can be configured to be capable of being in a regulating state and a bypass state. In the regulating state, an input voltage greater than a selected value can be regulated so as to yield a desired output voltage such as a substantially constant voltage. In the bypass state, an input voltage at or less than the selected value can be regulated so as to yield an output voltage that substantially tracks the input voltage. Such a capability of switching between two modes can provide advantageous features such as reducing the likelihood of damage in a powered circuit due to high input voltage, and extending the operating duration of a power source such as a rechargeable battery. Also disclosed are examples of how the foregoing features can be implemented in different products and methods of operation and fabrication.

Abstract: Methods for forming an insert, such as a threaded or threadable insert, within a cavity in an implant, such as a spinal spacer. In some implementations, an implant body comprising a first, non-threadable, may be provided. A cavity may be formed in the implant body, after which an insert may be positioned within the cavity. Preferably, the insert comprises a second material distinct from the first material, wherein the second material has physical properties distinct from the first material. A female thread may then be formed within the insert, which may allow for threading an otherwise unthreadable, or relatively unthreadable, material.

Abstract: Systems and methods for forming an insert, such as a threaded or threadable insert, within a cavity in an implant, such as a spinal spacer. According to various embodiments, a spinal interbody spacer may include a proximal end and a distal end. The interbody spacer may be manufactured using a non-threadable material, or at least a material that is difficult to thread, such as a ceramic, a glass, or a porous material. Some embodiments may comprise a silicon nitride ceramic material. A cavity may be formed in the interbody spacer, such as in the proximal end. A material having desired properties lacking in the spacer, such as a threadable insert within a non-threadable spacer, may be inserted into the cavity. The threadable material may then be threaded in order to form a female-threaded insert within the otherwise non-threadable interbody spacer.

Abstract: The present invention is directed to a method of making thermoplastic granulates. A comminuted biomass is mixed with a lignin swellant such that the content of substances soluble in diethyl ether is at least 3.0% and ground and processed in a compounding extruder equipped with compaction, heating, cooling venting and grinding zones to form thermoplastic dry blends and granulates.

Abstract: Apparatus and methods for negative voltage generation with reduced clock feed-through are provided. In certain configurations, a method of negative voltage generation in a wireless device is provided. The method includes generating a regulated voltage from a battery voltage using a voltage regulator, powering a first charge pump and a second charge pump using the regulated voltage, generating a first negative voltage based on timing of a first clock phase using the first charge pump, generating a second negative voltage based on the first negative voltage and on timing of a second clock phase using the second charge pump, and generating the first clock phase and the second clock phase with different phases using a poly-phase oscillator such that the first charge pump and the second charge pump draw from the regulated voltage at different points in time.

Abstract: Biomedical implant fastener systems, such as bone screw systems and the like. In some embodiments, a fastener may comprise a first plurality of teeth, and a washer configured to be received on the fastener may comprise a second plurality of teeth configured to be engaged with the first plurality of teeth. The first plurality of teeth may be configured to engage with the second plurality of teeth such that so as to allow for selective rotation between the washer and the fastener in a first rotational direction and so as to prevent rotation between the washer and the fastener in a second rotational direction opposite from the first rotational direction when the fastener is engaged with the washer such that second plurality of teeth is engaged with the first plurality of teeth so as to prevent the fastener from backing out of the washer after engagement.

Abstract: Implementations of radio frequency switch controllers within the scope of the appended claims are configured to reduce the impact of the clock signal induced spurs. In particular, implementations of switch controllers described herein include a poly-phase clocking scheme, as opposed to a single phase to clock the charge pump stages of an negative voltage generator. In some implementations poly-phase clocking schemes reduce the clock signal induced spurs and may preclude the need for additional on-chip or off-chip decoupling capacitors that add to the cost and physical size of a complete front end module solution.

Abstract: Implementations of radio frequency switch controllers within the scope of the appended claims are configured to reduce the impact of the clock signal induced spurs. In particular, implementations of switch controllers described herein include a poly-phase clocking scheme, as opposed to a single phase to clock the charge pump stages of an negative voltage generator. In some implementations poly-phase clocking schemes reduce the clock signal induced spurs and may preclude the need for additional on-chip or off-chip decoupling capacitors that add to the cost and physical size of a complete front end module solution.

Abstract: A method of analyzing controlled source electromagnetic (CSEM) survey data to determine probability density functions (PDFs) for values of an electromagnetic parameter at locations in a subterranean region of interest is provided. Structural features in the subterranean strata are identified, e.g. from seismic survey data. An initial PDF for values of the electromagnetic parameter is then assigned to each feature. Models specifying values for the parameter in each structural feature are generated by sampling the PDFs. A subset of the models are deemed acceptable based on an acceptance criterion. The PDF for each feature is modified based on values for the parameter in the subset of accepted models to generate replacement PDFs for each feature. The process may be iterated a number of times to generate final PDFs for values of the electromagnetic parameter in the structural features identified in the subterranean region of interest.

Abstract: Apparatus and methods for bypassing an inductor of a voltage converter are provided. In one embodiment, a voltage converter includes an inductor and a bypass circuit that selectively bypasses the inductor based on a state of a bypass control signal. The inductor includes including a first end electrically connected to a first node and a second end electrically connected to a second node. The bypass circuit includes a first p-type field effect transistor and a second p-type field effect transistor electrically connected in series between the first node and the second node. The first p-type field effect transistor includes a body electrically connected to a first voltage, and the second p-type field effect transistor includes a body electrically connected to a second voltage greater than the first voltage.

Abstract: A low frequency loss correction circuit that improves the efficiency of a power amplifier at near-DC low frequencies The low frequency loss correction circuit can include a signal error detection circuit configured to produce an error signal in response to detecting one or more frequency components of a tracking signal below a cutoff frequency that are substantially attenuated through a capacitive path. The low frequency loss correction circuit can include a drive circuit configured to convert the error signal into a low frequency correction signal, and provide the low frequency correction signal to a voltage supply line, the low frequency correction signal including at least some of the one or more frequency components of the tracking signal below a cutoff frequency that are substantially attenuated through the capacitive path.

Abstract: Spinal implants for positioning between adjacent vertebrae. Some embodiments may comprise a pair of opposed sidewall surfaces, a pair of opposed frictional surfaces, a first end wall joining the pair of opposed sidewall surfaces, and a second end wall recessed at least in part and joining the pair of opposed sidewall surfaces. A fish-tailed structure may be positioned within the second end wall when viewed from one of the opposed frictional surface. The fish-tailed structure may be formed so as to extend at least substantially uninterrupted between at least one of the opposed sidewall surfaces and the opposed frictional surfaces. A retention structure, such as a hole, may be positioned within the fish-tailed structure. The hole may be configured to engage a surgical implantation device.

Abstract: Implementations of radio frequency switch controllers within the scope of the appended claims are configured to reduce the impact of the clock signal induced spurs. In particular, implementations of switch controllers described herein include a poly-phase clocking scheme, as opposed to a single phase to clock the charge pump stages of an negative voltage generator. In some implementations poly-phase clocking schemes reduce the clock signal induced spurs and may preclude the need for additional on-chip or off-chip decoupling capacitors that add to the cost and physical size of a complete front end module solution.

Abstract: Implementations of radio frequency switch controllers within the scope of the appended claims are configured to reduce the impact of the clock signal induced spurs. In particular, implementations of switch controllers described herein include a poly-phase clocking scheme, as opposed to a single phase to clock the charge pump stages of an negative voltage generator. In some implementations poly-phase clocking schemes reduce the clock signal induced spurs and may preclude the need for additional on-chip or off-chip decoupling capacitors that add to the cost and physical size of a complete front end module solution.

Abstract: Apparatus and methods for voltage converter bypass circuits are provided. In one embodiment, a voltage conversion system includes a bypass circuit and a voltage converter including an inductor and a plurality of switches configured to control a current through the inductor. The bypass circuit includes a first p-type field effect transistor, a second p-type field effect transistor, a first n-type field effect transistor, and a second n-type field effect transistor. The first and second n-type field effect transistors are electrically in series between a first end and a second end of the inductor. Additionally, the first and second p-type field effect transistor transistors are electrically connected in series between the first end and the second end of the inductor.