Abstract: Testing a semiconductor can be time-consuming as the chip architecture becomes more complex. Testing the possible scenarios becomes increasingly difficult. Chip quality characteristics relating to the chips on a wafer can be used to estimate a probability or rating relating to bypassing system-level testing (SLT). A chip can bypass SLT if there is a high likelihood of passing SLT. Thousands of chip characteristics can be received from wafer testing, chip probe testing, environmental parameters, factory parameters, and other parameters. A chip quality model can use chip quality characteristics as input to generate chip group and SLT parameters. The chip quality model can be a machine learning model or other types of machine learning systems. The chip group parameter or the SLT parameter can be used to direct the testing path of a chip where some chips can bypass SLT thereby saving production time.

Abstract: Methods and apparatus for tracking antimicrobial resistance based on geography. An application server receives a query from a client application to provide antimicrobial resistance data for a geographic location. The application server determines a geographic region based, at least in part, on the geographic location included in the query, and antimicrobial data for samples collected from patients residing in the geographic region are retrieved from at least one health information datastore of a health information system. The retrieved antimicrobial data comprises information describing antimicrobial resistance of an infectious organism detected in the biological samples to at least one antimicrobial agent, and is transmitted to a client device on which the client application that issued the query is executing.

Abstract: Methods and apparatus for tracking antimicrobial resistance based on geography. An application server receives a query from a client application to provide antimicrobial resistance data for a geographic location. The application server determines a geographic region based, at least in part, on the geographic location included in the query, and antimicrobial data for samples collected from patients residing in the geographic region are retrieved from at least one health information datastore of a health information system. The retrieved antimicrobial data comprises information describing antimicrobial resistance of an infectious organism detected in the biological samples to at least one antimicrobial agent, and is transmitted to a client device on which the client application that issued the query is executing.

Abstract: A wafer acceptance test (WAT) system and method that, in one embodiment, includes: (1) a saturation current WAT subsystem operable to generate a weighted standard deviation based on target NMOS and PMOS saturation currents and saturation current WAT results, (2) a wafer IC speed WAT subsystem operable to generate a speed performance probability distribution of wafer ICs based on the weighted standard deviation and speed WAT results, (3) a wafer IC power WAT subsystem operable to employ the speed WAT results and power WAT results to generate a power performance model of wafer ICs, and (4) a yield calculator operable to generate a power performance variance probability distribution of wafer ICs based on the power performance model and the power WAT results, and to employ the speed performance probability distribution and the power performance variance probability distribution to generate the yield forecast with respect to a target performance profile.

Abstract: A wafer acceptance test (WAT) system and method that, in one embodiment, includes: (1) a saturation current WAT subsystem operable to generate a weighted standard deviation based on target NMOS and PMOS saturation currents and saturation current WAT results, (2) a wafer IC speed WAT subsystem operable to generate a speed performance probability distribution of wafer ICs based on the weighted standard deviation and speed WAT results, (3) a wafer IC power WAT subsystem operable to employ the speed WAT results and power WAT results to generate a power performance model of wafer ICs, and (4) a yield calculator operable to generate a power performance variance probability distribution of wafer ICs based on the power performance model and the power WAT results, and to employ the speed performance probability distribution and the power performance variance probability distribution to generate the yield forecast with respect to a target performance profile.

Abstract: A self contained circuit board and housing therefore adapted to be positioned within a telephone network interface housing in which provision is made for variance in the dimensions of a pair of retaining slots in the interface housing of different manufacture. The circuit board housing includes a pair of oppositely disposed side walls, each having a laterally extending flange include a resilient component which flexed to accommodate for differences in clearances between the retaining slots.

Abstract: An improved surge protection unit suitable for use with Western Electric Type 66 blocks, having provision for grounding of the individual subscriber circuit at the block location is disclosed.

Abstract: A moulded resilient sealing device adapted to close the exposed opening in a telephone subscriber jack to prevent entry of moisture, vermin and the like. The device includes a cap-like body having a continuous peripheral edge which contacts a planar surface surrounding the plug opening, and a smaller opening at an opposite end thereof which resiliently clamps a flattened cable leading to subscriber equipment, such as a telephone handset at one end and a corresponding plug engaging jack at an opposite end. The opening is shiftable along the cable to increase the resilient force applied to the peripheral edge. The edge is also reinforced along one rectilinear side to prevent distortion by contact with the release lever of the plug, and accomodate for commerical manufacturing tolerances encountered in jacks of different manufacture.

Abstract: A multi-circuit test shoe adapted to be fitted over a telephone circuit connector block having individual subscriber circuit protector modules thereon, the shoe having means for selectively lifting said modules on an individual basis from fully engaged to detent positions on said blocks.

Abstract: A subscriber network interface device for multiple subscriber pairs at a common location housed internally in a compact connector block easily mounted upon a wall by screws or a known mounting bracket to eliminate the need for installation of separate one or two line network interface devices. Incoming line connection is made using quick clip elements. Outgoing line connection is made via a female connector which is used to communicate with other quick clips. The circuits are latched in actuated state by the application of a 130 volt direct current applied to the tip or ring side of the line.

Abstract: A flexible resilient protective boot for shielding an engaged telephone subscriber plug and jack interconnection against moisture, vermin, insects and the like. The boot is suitable for installation by the subscriber without the use of tools and employing only ordinary skill. In each of the embodiments, the boot comprises a pair of separable members which are spreadable to enclose part of the plug structure, and resilient means engaging said separable members to maintain them in abutted relation.

Abstract: An improved telephone modular wall jack particlarly suitable for subscriber installation within the home or other subscriber premises. The jack includes a fixed mounting element slidably engageable with a housing element containing means for stripping insulation from conductors and interconnecting them without the use of tools or special skills. The interconnection of conductors can be accomplished while the housing is in detached condition from the mounting element, following which the housing is attached to the mounting element for installation upon a wall.

Abstract: An improvement for retaining wire type contacts of a rotary switch in position upon a stator to facilitate assembly during manufacture. In lieu of previously employed glued or heat sealed construction, the improvement is provided with a resiliently expandable periphery which engages an annular shoulder on the stator element without resort to the use of tools or adhesives.

Abstract: An improved terminal pin and mounting construction therefor, for use in multicontact switches using flexible wire type contacts mounted upon a stator element, the contacts being bridged by corresponding contacts on a coaxially mounted rotor element. The mounting utilizes improved flexibility of the contact portion of each of the pins to lessen the stress placed upon the fixed mounting portion thereof.