Patents by Inventor Peter J. Beckage
Peter J. Beckage has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7754587Abstract: A semiconductor process and apparatus provide a planarized hybrid substrate (16) by selectively depositing an epitaxial silicon layer (70) to fill a trench (96), and then blanket depositing silicon to cover the entire wafer with near uniform thickness of crystalline silicon (102) over the epi silicon layer (70) and polycrystalline silicon (101, 103) over the nitride mask layer (95). The polysilicon material (101, 103) added by the two-step process increases the polish rate of subsequent CMP polishing to provide a more uniform polish surface (100) over the entire wafer surface, regardless of variations in structure widths and device densities. By forming first gate electrodes (151) over a first SOI layer (90) using deposited (100) silicon and forming second gate electrodes (161) over an epitaxially grown (110) silicon layer (70), a high performance CMOS device is obtained which includes high-k metal PMOS gate electrodes (161) having improved hole mobility.Type: GrantFiled: March 14, 2006Date of Patent: July 13, 2010Assignee: Freescale Semiconductor, Inc.Inventors: Gregory S. Spencer, Peter J. Beckage, Mariam G. Sadaka
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Patent number: 7670895Abstract: A process of forming an electronic device can include patterning a semiconductor layer to define an opening. After patterning the semiconductor layer, the opening can have a bottom, and the semiconductor layer can have a sidewall and a surface. The surface is spaced apart from the bottom of the opening. The sidewall can extend from the surface towards the bottom of the opening. The process can also include forming a layer over the semiconductor layer and within the opening, and removing a part of the first layer from within the opening. After removing the part of the layer, a remaining portion of the layer may lie within the opening and adjacent to the bottom and the sidewall, and the remaining portion of the layer may be spaced apart from the surface. In another aspect, the electronic device can include a field isolation region including the first layer.Type: GrantFiled: April 24, 2006Date of Patent: March 2, 2010Assignee: Freescale Semiconductor, IncInventors: Toni D. Van Gompel, Peter J. Beckage, Mohamad M. Jahanbani, Michael D. Turner
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Patent number: 7378306Abstract: A semiconductor process and apparatus provide a planarized hybrid substrate (225) having a more uniform polish surface (300) by thickening an SOI semiconductor layer (210) in relation to a previously or subsequently formed epitaxial silicon layer (220) with a selective silicon deposition process that covers the SOI semiconductor layer (210) with a crystalline semiconductor layer (216). By forming first gate electrodes (151) over a first SOI substrate (90) using deposited (100) silicon and forming second gate electrodes (161) over an epitaxially grown (110) silicon substrate (70), a high performance CMOS device is obtained which includes high-k metal PMOS gate electrodes (161) having improved hole mobility.Type: GrantFiled: March 14, 2006Date of Patent: May 27, 2008Assignee: Freescale Semiconductor, Inc.Inventors: Gregory S. Spencer, Peter J. Beckage, Mariam G. Sadaka, Veer Dhandapani
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Patent number: 6809032Abstract: In another aspect of the present invention, a system for detecting an endpoint in a polishing process is provided. The system comprises a polishing tool, a controllable light source, a sensor, and a controller. The polishing tool is capable of polishing a surface of a semiconductor device, wherein the semiconductor device includes a first layer comprised of a first material and a second layer comprised of a second material. The first layer is positioned above the second layer. The controllable light source is capable of delivering light having one of a plurality of a preselected frequencies to the surface of the semiconductor device. The sensor is capable of detecting the light reflected from the surface of the semiconductor device.Type: GrantFiled: May 1, 2002Date of Patent: October 26, 2004Assignee: Advanced Micro Devices, Inc.Inventors: Frank Mauersberger, Peter J. Beckage, Paul R. Besser, Frederick N. Hause, Errol Todd Ryan, William S. Brennan, John A. Iacoponi
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Patent number: 6666754Abstract: A method includes supplying a signal to rotationally drive a conditioning wheel of a conditioning tool. A polishing pad of a polishing tool is conditioned using the rotationally driven conditioning wheel. Changes in the signal driving the conditioning wheel during the conditioning process are monitored. A conditioning effectiveness of the conditioning wheel is determined based on the changes observed in the monitored signal. A system includes a conditioning tool and a controller. The conditioning tool is adapted to condition a polishing pad of a polishing tool. The controller is coupled to at least one of the polishing tool or the conditioning tool. The controller is adapted to supply a signal to rotationally drive a conditioning wheel of the conditioning tool, monitor changes in the signal driving the conditioning wheel during a conditioning process, and determine a conditioning effectiveness of the conditioning wheel based on changes observed in the monitored signal.Type: GrantFiled: January 18, 2000Date of Patent: December 23, 2003Assignee: Advanced Micro Devices, Inc.Inventor: Peter J. Beckage
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Patent number: 6572443Abstract: An apparatus and method for detecting a process endpoint. The method includes receiving a first data signal and a second data signal and combining the first data signal and the second data signal to generate a combined data signal. The method also includes detecting a peak in the combined data signal, wherein the peak indicates the process endpoint. The apparatus includes a data collection unit capable of receiving a plurality of data signals and a signal analysis unit. The signal analysis unit is capable of combining the plurality of data signals received through the data collection unit to generate a combined data signal and identifying a peak in the combined data signal indicative of the process endpoint.Type: GrantFiled: August 7, 2000Date of Patent: June 3, 2003Assignee: Advanced Micro Devices Inc.Inventors: Peter J. Beckage, Keith A. Edwards, Ralf B. Lukner, Wonhui Cho
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Patent number: 6555479Abstract: A method for forming a conductive interconnect comprises forming a process layer over a structure layer and forming a mask over the process layer, the mask having an etch profile therein. An anisotropic etching process is performed to erode the mask and to form an etched region in the process layer, the etched region having a profile correlating to the etch profile. A conductive material is formed in the etched region in the process layer and any excess conductive material is removed from above an upper surface of the process layer.Type: GrantFiled: June 11, 2001Date of Patent: April 29, 2003Assignee: Advanced Micro Devices, Inc.Inventors: Frederick N. Hause, Paul R. Besser, Frank Mauersberger, Errol Todd Ryan, William S. Brennan, John A. Iacoponi, Peter J. Beckage
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Patent number: 6514858Abstract: A test structure useful in controlling a polishing process of a semiconductor device is provided. The test structure is comprised of a structure layer, a first process layer, and interconnects. The first process layer is positioned above the structure layer and has a plurality of openings formed therein and extending at least partially therethrough to a preselected depth. At least a portion of the plurality of openings have a tapered region progressively narrowing in a direction from the first process layer toward the structure layer. The openings are spaced a preselected distance X apart. The interconnects are formed in the plurality of openings including the tapered region. Thus, as the process layer and interconnects are removed by the polishing process, the distance X increases, indicating the depth of the polishing process.Type: GrantFiled: April 9, 2001Date of Patent: February 4, 2003Assignee: Advanced Micro Devices, Inc.Inventors: Frederick N. Hause, Paul R. Besser, Frank Mauersberger, Errol Todd Ryan, William S. Brennan, John A. Iacoponi, Peter J. Beckage
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Patent number: 6489240Abstract: A method for forming a semiconductor having improved copper interconnects is provided. The method comprises forming a first dielectric layer above a first structure layer. Thereafter, a first opening is formed in the first dielectric layer, and a first copper layer is formed above the first dielectric layer and in the first opening. A portion of the first copper layer outside of the opening is removed. A surface portion of the first copper layer is also removed from within the opening, and a second layer of copper is formed above the first layer of copper, replacing the removed surface portion.Type: GrantFiled: May 31, 2001Date of Patent: December 3, 2002Assignee: Advanced Micro Devices, Inc.Inventors: John A. Iacoponi, Paul R. Besser, Frederick N. Hause, Frank Mauersberger, Errol Todd Ryan, William S. Brennan, Peter J. Beckage
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Patent number: 6413846Abstract: A method of forming conductive contacts or an integrated circuit device is disclosed herein. In one embodiment, the method comprises forming a transistor above a semiconducting substrate, and forming a first layer comprised of an orthosilicate glass material above the transistor and the substrate. The method further comprises forming a second layer comprised of an insulating material above the first layer, and performing at least one etching process to define an opening in the second layer for a conductive contact to be formed therein, wherein the first layer comprised of an orthosilicate glass material acts as an etch stop layer during the etching of the opening in the second layer.Type: GrantFiled: November 14, 2000Date of Patent: July 2, 2002Assignee: Advanced Micro Devices, Inc.Inventors: Paul R. Besser, Errol Todd Ryan, Frederick N. Hause, Frank Mauersberger, William S. Brennan, John A. Iacoponi, Peter J. Beckage
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Patent number: 6368184Abstract: A polishing system includes a polishing tool having a platen, a polishing pad, and a controller. The platen is adapted to have the polishing pad attached thereto. The polishing pad includes a polishing surface and a back surface that is opposite the polishing surface. At least one sender electrode and at least one response electrode is disposed in the polishing pad. The controller is coupled to the polishing tool. A method includes polishing a conductive process layer of a wafer using a polishing pad of a polishing tool having at least one sender electrode and at least one response electrode disposed therein. A signal is provided to the at least one sender electrode. The signal provided to the at least one sender electrode is monitored with at least one of a group of the at least one response electrode, the at least one response electrode communicating with the at least one sender electrode through the conductive process layer of the wafer.Type: GrantFiled: January 6, 2000Date of Patent: April 9, 2002Assignee: Advanced Micro Devices, Inc.Inventor: Peter J. Beckage
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Patent number: 6325705Abstract: A chemical-mechanical polishing slurry made by mixing a ferric salt oxidizer with a solution to produce a mixture with a dissolved ferric salt oxidizer, filtering the mixture to remove most preexisting particles therein that exceed a selected particle size, adding a suspension agent to the mixture, and adding abrasive particles to the mixture after filtering the mixture. Advantageously, when polishing occurs, scratching by the preexisting particles is dramatically reduced.Type: GrantFiled: December 28, 2000Date of Patent: December 4, 2001Assignee: Advanced Micro Devices, Inc.Inventors: Peter A. Burke, Peter J. Beckage
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Publication number: 20010002357Abstract: A method of making a chemical-mechanical polishing slurry includes mixing a ferric salt oxidizer with a solution to produce a mixture with a dissolved ferric salt oxidizer, filtering the mixture to remove most preexisting particles therein that exceed a selected particle size, adding a suspension agent to the mixture, and adding abrasive particles to the mixture after filtering the mixture. Advantageously, when polishing occurs, scratching by the preexisting particles is dramatically reduced.Type: ApplicationFiled: December 28, 2000Publication date: May 31, 2001Inventors: Peter A. Burke, Peter J. Beckage
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Patent number: 6179688Abstract: The invention, in a first aspect, includes a method and apparatus for detecting the endpoint in a chemical-mechanical polishing process. The first aspect includes a chemical-mechanical polishing tool modified to receive a first and a second data signal; combine the first and second data signals to generate a combined data signal; and detect a peak in the combined data signal, wherein the peak indicates the process endpoint. In a second aspect, the invention is a method and an apparatus for detecting the endpoint in a chemical-mechanical polishing process. The second aspect includes an apparatus implementing a method in which a data signal is received. The data signal is analyzed to detect a peak indicative of the process endpoint in the received data signal.Type: GrantFiled: March 17, 1999Date of Patent: January 30, 2001Assignee: Advanced Micro Devices, Inc.Inventors: Peter J. Beckage, Keith A. Edwards, Ralf B. Lukner, Wonhui Cho
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Patent number: 6168640Abstract: A method of making a chemical-mechanical polishing slurry includes mixing a ferric salt oxidizer with a solution to produce a mixture with a dissolved ferric salt oxidizer, filtering the mixture to remove most preexisting particles therein that exceed a selected particle size, adding a suspension agent to the mixture, and adding abrasive particles to the mixture after filtering the mixture. Advantageously, when polishing occurs, scratching by the preexisting particles is dramatically reduced.Type: GrantFiled: March 29, 1999Date of Patent: January 2, 2001Assignee: Advanced Micro Devices, Inc.Inventors: Peter A. Burke, Peter J. Beckage
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Patent number: 6051495Abstract: A tungsten prepper for seasoning a semiconductor wafer polishing pad to polish tungsten on a semiconductor wafer. The prepper includes a support device having a first surface and a seasoning layer attached to the first surface of the support device. The seasoning layer is made of a seasoning material for seasoning a polishing pad to polish tungsten. In one embodiment, the seasoning layer is flame sprayed on the surface of the support device. In another embodiment, the tungsten is inserted into notches in the surface. The seasoning material includes tungsten, and in some embodiments, an adhesion promoter such as nickel. The prepper can be attached to a conditioning arm of a Chemical Mechanical Polisher. The prepper can be used to season a new polishing pad until the tungsten polishing rate of the pad is above 4000 angstroms per minute. The prepper can also include conditioners to condition a pad while seasoning the pad.Type: GrantFiled: October 31, 1997Date of Patent: April 18, 2000Assignee: Advanced Micro Devices, Inc.Inventors: Peter A. Burke, Kevin D. Shipley, Peter J. Beckage
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Patent number: 5934978Abstract: A method of making a chemical-mechanical polishing slurry includes mixing a ferric salt oxidizer with a solution to produce a mixture with a dissolved ferric salt oxidizer, filtering the mixture to remove most preexisting particles therein that exceed a selected particle size, adding a suspension agent to the mixture, and adding abrasive particles to the mixture after filtering the mixture. Advantageously, when polishing occurs, scratching by the preexisting particles is dramatically reduced.Type: GrantFiled: August 15, 1997Date of Patent: August 10, 1999Assignee: Advanced Micro Devices, Inc.Inventors: Peter A. Burke, Peter J. Beckage