Abstract: A monitoring device has an event monitor, an uplink interface to a chain controller device, and a downlink interface to a further monitoring device, and a daisy controller for coupling the uplink to the chain downlink. The event monitor, in response to detecting an event in sleep mode, generates a wake-up signal. The daisy controller sets the electronic monitoring device to a wake-up request mode and disables the bidirectional data communication via the downlink interface, and subsequently transmits a wake-up request to the chain controller device via the uplink interface. In response to receiving a wake-up command, the daisy controller re-enables the bidirectional data communication via the downlink interface and sets the electronic monitoring device to the operational mode. Thereby a wake-up sequence is performed while the wake-up request mode avoids bus conflicts.

Abstract: A monitoring device has an event monitor, an uplink interface to a chain controller device, and a downlink interface to a further monitoring device, and a daisy controller for coupling the uplink to the chain downlink. The event monitor, in response to detecting an event in sleep mode, generates a wake-up signal. The daisy controller sets the electronic monitoring device to a wake-up request mode and disables the bidirectional data communication via the downlink interface, and subsequently transmits a wake-up request to the chain controller device via the uplink interface. In response to receiving a wake-up command, the daisy controller re-enables the bidirectional data communication via the downlink interface and sets the electronic monitoring device to the operational mode. Thereby a wake-up sequence is performed while the wake-up request mode avoids bus conflicts.

Abstract: Embodiments of an electronic circuit for monitoring a battery stack enable cell balancing while conserving pin-count of the circuit package. The illustrative electronic circuit comprises a battery monitoring integrated circuit configured for monitoring a plurality of cells in the battery stack. The battery monitoring integrated circuit is arranged to share a common node pin between two adjacent battery cells in the battery stack for the purpose of cell balancing.

Abstract: Geometrically based system and method for receiving capacitive sensory input. User input may be received by a capacitive sensing pad. A signal may be generated by the capacitive sensing pad. The signal may indicate a size of an area in which the user input is received. The signal may be received by an input composed in processing circuitry and coupled to the capacitive sensing pad. A location of the user input may be determined by the processing circuitry based on the signal.

Abstract: Embodiments of an electronic circuit for monitoring a battery stack enable cell balancing while conserving pin-count of the circuit package. The illustrative electronic circuit comprises a battery monitoring integrated circuit configured for monitoring a plurality of cells in the battery stack. The battery monitoring integrated circuit is arranged to share a common node pin between two adjacent battery cells in the battery stack for the purpose of cell balancing.

Abstract: Geometrically based system and method for receiving capacitive sensory input. User input may be received by a capacitive sensing pad. A signal may be generated by the capacitive sensing pad. The signal may indicate a size of an area in which the user input is received. The signal may be received by an input composed in processing circuitry and coupled to the capacitive sensing pad. A location of the user input may be determined by the processing circuitry based on the signal.

Abstract: According to one embodiment, an integrated fault detector circuit is used to detect one or more of the open circuit and short circuit of a load connected to an integrated circuit power MOSFET driver by directly detecting the level of current flowing in a floating current source.

Abstract: A method and circuit is provided which controls and monitors a load through a single I/O pin of a microprocessor. A predriver circuit including a level shifter responds to a driver control signal from the microprocessor to control energization of a power driver connected in a load circuit. The predriver circuit also includes a monitor stage for detecting fault conditions of the load circuit. The output of the monitor stage is connected with the I/O pin which is configured as either an input or an output pin under microprocessor program control.