Patents by Inventor Peter J. Boldt

Peter J. Boldt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5933655
    Abstract: A system for scheduling periodic events having varying rates. The system uses a linked list type data structure and an array to schedule the plurality of events having varying rates. In a preferred embodiment of the invention, data items are scheduled for transfer during a plurality of data transfer intervals. The linked list type data structure is traversed for each data transfer interval to collect the data items requiring transfer.
    Type: Grant
    Filed: September 30, 1996
    Date of Patent: August 3, 1999
    Assignee: Allen-Bradley Company, LLC
    Inventors: Tina L. Vrabec, Peter J. Boldt, Amy J. Wallaert, Scot A. Tutkovics
  • Patent number: 5933654
    Abstract: A data control system having a host microprocessor, a data receiving device and a DMA controller. The DMA controller being used to control the fragmentation and recombination of a buffer memory area. The data being processed in data packets and using DMA buffer chaining.
    Type: Grant
    Filed: September 24, 1996
    Date of Patent: August 3, 1999
    Assignee: Allen-Bradley Company, LLC
    Inventors: Daniel J. Galdun, Peter J. Boldt
  • Patent number: 5862411
    Abstract: A controller based network, where data from a plurality of nodes is placed onto the network in a scheduled predetermined order during a network update interval. The data transmitted onto the network being collected following the issuance of a data collection start signal issued in accordance with a timer, whereby the issuance of the data collection start signal can be varied within the network update interval. The collected data being transmitted onto the network upon the issuance of a data transmission signal.
    Type: Grant
    Filed: June 10, 1996
    Date of Patent: January 19, 1999
    Assignee: Allen Bradley Company, Inc.
    Inventors: James J. Kay, Peter J. Boldt
  • Patent number: 5809334
    Abstract: A processor-based control system including a host processor, a data receiver device, a system memory, and an intelligent DMA controller. The DMA controller includes a pre-parsing section. The pre-parsing section interrogating a received data packet to determine whether the received data packet contains an error, is valid, is a null packet or whether the host processor must be contacted.
    Type: Grant
    Filed: September 24, 1996
    Date of Patent: September 15, 1998
    Assignee: Allen-Bradley Company, LLC
    Inventors: Daniel J. Galdun, Peter J. Boldt