Patents by Inventor Peter J. Castagna

Peter J. Castagna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6400732
    Abstract: A method and apparatus for determining synchronization and loss of synchronization in a high speed multiplexed data system. The system also includes a plurality of justification control bits and a backwards compatibility flag that allows the system to operate with older systems that have fewer justification control bits.
    Type: Grant
    Filed: August 26, 1999
    Date of Patent: June 4, 2002
    Assignee: DMC Stratex Networks, Inc.
    Inventors: Peter J. Castagna, David Randall
  • Patent number: 6011807
    Abstract: A method and apparatus for determining synchronization and loss of synchronization in a high speed multiplexed data system. The system also includes a plurality of justification control bits and a backwards compatibility flag that allows the system to operate with older systems that have fewer justification control bits.
    Type: Grant
    Filed: July 18, 1997
    Date of Patent: January 4, 2000
    Assignee: Innova Corporation
    Inventors: Peter J. Castagna, David Randall