Patents by Inventor Peter Jeng

Peter Jeng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060189059
    Abstract: A plurality of N-doped strip portions are formed alternating with a plurality of P-doped regions. When a voltage is applied to the N-doped strip portions, a capacitance is created between the N-doped strip portions and the P-doped strip portions. A capacitance is also created between the N-doped strip portions and the underlying epitaxial silicon layer. A larger interface area between N-doped and P-doped regions generally increases the capacitance. By providing the N-doped strip portions, as opposed to a continuous N-doped region, the combined interface area between the N-doped strip portions and the underlying epitaxial silicon layer is reduced. However, more interface area is provided between the N-doped strip portions and the P-doped strip portions. A circuit simulation indicates that junction capacitance per unit peripheral length is 0.41 fF/?m, while the junction capacitance per unit area is 0.19 fF/?mˆ2.
    Type: Application
    Filed: February 23, 2005
    Publication date: August 24, 2006
    Inventors: Jung Kang, Peter Jeng, Michael DeSmith, Md Hossain, Yi-feng Liu