Patents by Inventor Peter Jentsch

Peter Jentsch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6771670
    Abstract: In a telecommunication system where data frames of a plurality of channels (CH1,CH2. . . CHn) arrive with respective different time-offsets with respect to a common synchronization clock (WR, R/W, RD, T) of an internal frame structure of a decoder (DEC), three frame memories (RAM1, RAM2, RAM3) are used for performing a time-alignment of the data frames. The data frames are respectively written to two frame memories (RAM1, RAM2) having a read state and a reading of one frame memory (RAM3) is performed beginning with the occurrence of the common synchronization clock (T). A cyclic switching of the read/write state of the frame memories (RAM1, RAM2, RAM3) is performed, such that always two frame memories (RAM1, RAM2) are in a write-state (WR) and one frame memory (RAM3) is in a read-state (RD) The frame memory (RAM3) in the read-state is read out synchronized to the common synchronization clock.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: August 3, 2004
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Jürgen Pfahler, Peter Jentsch