Patents by Inventor Peter JERABEK

Peter JERABEK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor substrate comprising a through-substrate-via and method for producing thereof
    Patent number: 12757705
    Abstract: A semiconductor device includes a substrate—with a rear surface and a main surface, an intermetal dielectric on the main surface of substrate, a metal layer embedded in the intermetal dielectric. The metal layer includes a top barrier layer. The top barrier layer is at a side of the metal layer facing away from the substrate. The semiconductor device also includes a through-substrate-via (TSV) reaching from the rear surface of the substrate to the top barrier layer of the metal layer. The TSV includes a metallization configured to electrically contact the metal layer from the rear surface of the substrate. The TSV includes a via hole. The via hole penetrates the substrate and the intermetal dielectric between the substrate and the metal layer. The via hole further penetrates the metal layer up to the top barrier layer.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: October 6, 2026
    Assignee: ams-OSRAM AG
    Inventors: Georg Parteder, Peter Jerabek, Jörg Siegert, Nebojsa Nenadovic
  • SEMICONDUCTOR SUBSTRATE COMPRISING A THROUGH-SUBSTRATE-VIA AND METHOD FOR PRODUCING THEREOF
    Publication number: 20240170371
    Abstract: A semiconductor device includes a substrate—with a rear surface and a main surface, an intermetal dielectric on the main surface of substrate, a metal layer embedded in the intermetal dielectric. The metal layer includes a top barrier layer. The top barrier layer is at a side of the metal layer facing away from the substrate. The semiconductor device also includes a through-substrate-via (TSV) reaching from the rear surface of the substrate to the top barrier layer of the metal layer. The TSV includes a metallization configured to electrically contact the metal layer from the rear surface of the substrate. The TSV includes a via hole. The via hole penetrates the substrate and the intermetal dielectric between the substrate and the metal layer. The via hole further penetrates the metal layer up to the top barrier layer.
    Type: Application
    Filed: March 9, 2022
    Publication date: May 23, 2024
    Inventors: Georg PARTEDER, Peter JERABEK, Jörg SIEGERT, Nebojsa NENADOVIC