Patents by Inventor Peter Jerome Sorce
Peter Jerome Sorce has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20220157657Abstract: Embodiments of the invention include a method of singulating IC chips from a wafer. The method can include receiving the wafer having a substrate formed under active layers. The wafer includes a chip that includes a first portion of the active layers and a first portion of the substrate. A separation trench is formed by using an etch operation to remove a first segment of the active layers and a first segment of the substrate that are beneath a first separation channel of the wafer. The separation trench separates the first portion of the active layers from a remaining portion of the active layers; and separates the first portion of the substrate from a remaining portion of the substrate. The first IC chip is seperated from the wafer by removing a first section of the remaining portion of the substrate that is underneath the first portion of the substrate.Type: ApplicationFiled: November 13, 2020Publication date: May 19, 2022Inventors: Cyril Cabral, JR., Frank Robert Libsch, Chitra Subramanian, Peter Jerome Sorce, Paul Alfred Lauro, John M. Papalia
-
Publication number: 20210028138Abstract: In an embodiment, a method for forming a solder bump includes preparing a transfer mold having a solder pillar extending from a mold substrate and through a first photoresist layer and having a shape partially defined by a second photoresist layer that is removed prior to transfer of the solder. In an embodiment, the mold substrate is flexible. In an embodiment, the transfer mold is flexible. In an embodiment, the method includes providing a device substrate having a wettable pad. In an embodiment, the method includes placing the transfer mold and the device substrate into aligned contact such that the solder pillar is in contact with the wettable pad. In an embodiment, the method includes forming a metallic bond between the solder pillar and the wettable pad. In an embodiment, the method includes removing the mold substrate and first photoresist layer.Type: ApplicationFiled: August 11, 2020Publication date: January 28, 2021Applicant: International Business Machines CorporationInventors: Eric Peter Lewandowski, Jae-Woong Nah, Jeng-Bang Yau, Peter Jerome Sorce
-
Patent number: 10879202Abstract: In an embodiment, a method for forming a solder bump includes preparing a transfer mold having a solder pillar extending from a mold substrate and through a first photoresist layer and having a shape partially defined by a second photoresist layer that is removed prior to transfer of the solder. In an embodiment, the mold substrate is flexible. In an embodiment, the transfer mold is flexible. In an embodiment, the method includes providing a device substrate having a wettable pad. In an embodiment, the method includes placing the transfer mold and the device substrate into aligned contact such that the solder pillar is in contact with the wettable pad. In an embodiment, the method includes forming a metallic bond between the solder pillar and the wettable pad. In an embodiment, the method includes removing the mold substrate and first photoresist layer.Type: GrantFiled: July 26, 2019Date of Patent: December 29, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Eric Peter Lewandowski, Jae-Woong Nah, Jeng-Bang Yau, Peter Jerome Sorce
-
Patent number: 10103450Abstract: Package structures are provided for integrally packaging antennas with semiconductor RFIC (radio frequency integrated circuit) chips to form compact integrated radio/wireless communications systems that operate in the millimeter-wave and terahertz frequency ranges. For example, a package structure includes an RFIC chip, and an antenna package bonded to the RFIC chip. The antenna package includes a glass substrate, at least one planar antenna element formed on a first surface of the glass substrate, a ground plane formed on a second surface of the glass substrate, opposite the first surface, and an antenna feed line formed through the glass substrate and connected to the at least one planar antenna element. The antenna package is bonded to a surface of the RFIC chip using a layer of adhesive material.Type: GrantFiled: August 10, 2016Date of Patent: October 16, 2018Assignee: International Business Machines CorporationInventors: Bing Dang, Duixian Liu, Jean-Olivier Plouchart, Peter Jerome Sorce, Cornelia Kang-I Tsang
-
Publication number: 20160352023Abstract: Package structures are provided for integrally packaging antennas with semiconductor RFIC (radio frequency integrated circuit) chips to form compact integrated radio/wireless communications systems that operate in the millimeter-wave and terahertz frequency ranges. For example, a package structure includes an RFIC chip, and an antenna package bonded to the RFIC chip. The antenna package includes a glass substrate, at least one planar antenna element formed on a first surface of the glass substrate, a ground plane formed on a second surface of the glass substrate, opposite the first surface, and an antenna feed line formed through the glass substrate and connected to the at least one planar antenna element. The antenna package is bonded to a surface of the RFIC chip using a layer of adhesive material.Type: ApplicationFiled: August 10, 2016Publication date: December 1, 2016Inventors: Bing Dang, Duixian Liu, Jean-Olivier Plouchart, Peter Jerome Sorce, Cornelia Kang-I Tsang
-
Patent number: 9472859Abstract: Package structures are provided for integrally packaging antennas with semiconductor RFIC (radio frequency integrated circuit) chips to form compact integrated radio/wireless communications systems that operate in the millimeter-wave and terahertz frequency ranges. For example, a package structure includes an RFIC chip, and an antenna package bonded to the RFIC chip. The antenna package includes a glass substrate, at least one planar antenna element formed on a first surface of the glass substrate, a ground plane formed on a second surface of the glass substrate, opposite the first surface, and an antenna feed line formed through the glass substrate and connected to the at least one planar antenna element. The antenna package is bonded to a surface of the RFIC chip using a layer of adhesive material.Type: GrantFiled: May 20, 2014Date of Patent: October 18, 2016Assignee: International Business Machines CorporationInventors: Bing Dang, Duixian Liu, Jean-Olivier Plouchart, Peter Jerome Sorce, Cornelia Kang-I Tsang
-
Publication number: 20150340765Abstract: Package structures are provided for integrally packaging antennas with semiconductor RFIC (radio frequency integrated circuit) chips to form compact integrated radio/wireless communications systems that operate in the millimeter-wave and terahertz frequency ranges. For example, a package structure includes an RFIC chip, and an antenna package bonded to the RFIC chip. The antenna package includes a glass substrate, at least one planar antenna element formed on a first surface of the glass substrate, a ground plane formed on a second surface of the glass substrate, opposite the first surface, and an antenna feed line formed through the glass substrate and connected to the at least one planar antenna element. The antenna package is bonded to a surface of the RFIC chip using a layer of adhesive material.Type: ApplicationFiled: May 20, 2014Publication date: November 26, 2015Applicant: International Business Machines CorporationInventors: Bing Dang, Duixian Liu, Jean-Olivier Plouchart, Peter Jerome Sorce, Cornelia Kang-I Tsang
-
Patent number: 6228511Abstract: This invention relates generally to a structure and process for thin film interconnect, and more particularly to a structure and process for a multilayer thin film interconnect structure with improved dimensional stability and electrical performance. The invention further relates to a process of fabrication of the multilayer thin film structures. The individual thin film structure is termed a compensator, and functions as both a ground/reference plane and as a stabilizing entity with regard to dimensional integrity. The compensator is comprised primarily of a metal sheet having a metallized via pattern and high-temperature stable polymer as an insulator.Type: GrantFiled: October 29, 1999Date of Patent: May 8, 2001Assignee: International Business Machines CorporationInventors: Krishna Gandhi Sachdev, Benedikt Maria Johannes Kellner, Kathleen Mary Mc Guire, Peter Jerome Sorce
-
Patent number: 6165629Abstract: This invention relates generally to a structure and process for thin film interconnect, and more particularly to a structure and process for a multilayer thin film interconnect structure with improved dimensional stability and electrical performance. The invention further relates to a process of fabrication of the multilayer thin film structures. The individual thin film structure is termed a compensator, and functions as both a ground/reference plane and as a stabilizing entity with regard to dimensional integrity. The compensator is comprised primarily of a metal sheet having a metallized via pattern and high-temperature stable polymer as an insulator.Type: GrantFiled: January 21, 1993Date of Patent: December 26, 2000Assignee: International Business Machines CorporationInventors: Krishna Gandhi Sachdev, Benedikt Maria Johannes Kellner, Kathleen Mary McGuire, Peter Jerome Sorce