Abstract: A main signal path filter is calibrated by calibrating a replica filter that tracks parametric changes in the main signal path filter. Programmed values of the replica filter determined during calibration are used to set programmed values in the main signal path filter. The main signal path filter signal does not need to be interrupted while calibration occurs. Power on testing of the main signal path filter and the replica filter can be performed to determine the parametric tracking relationship between the two filters.

Abstract: A local oscillator (LO) generator for driving a bank of mixers that provides precise phase relationship between multi-phase LO outputs comprises a shift register using slave-master-slave flip-flop elements. The LO generator can be used over a wide operating frequency range. The LO generator is suitable for driving a multi-phase LO clock input to a harmonic suppression mixer. A pattern generator produces a pattern signal and a reclocking signal that determines the frequency of the LO signals and the phase delay between the LO output phases.

Abstract: The present invention provides a technique for cancellation of jammer signals in a radio frequency receiver. A radio frequency signal contains both a desirable signal and an undesirable jammer signal. The combined signal is processed with a filter (104) to extract only the undesirable jammer signal. The jammer signal is then added (104) back to the combined signal to effectively cancel the jammer signal. The system may be implemented using a feedforward approach or a feedback approach. The resultant clean signal is processed in a conventional manner.

Abstract: Techniques are disclosed for compensating for second-order distortion in a wireless communication device. In a zero-intermediate frequency (IF) or low-IF architecture, IM2 distortion generated by the mixer (20) results in undesirable distortion levels in the baseband output signal. A compensation circuit (104) provides a measure of the IM2 distortion current independent of the radio frequency (RF) pathway to generate an IM2 calibration current. The IM2 calibration current is combined with the baseband output signal to thereby eliminate the IM2 currents generated within the RF pathway. In one embodiment, the calibration is provided at the factory during final testing. In alternative embodiment, additional circuitry (156, 158) may be added to the wireless communication device to provide a pathway between the transmitter (150) and the receiver (146). The transmitter signal is provided to the receiver to permit automatic calibration of the unit.

Abstract: The present invention provides a technique for cancellation of jammer signals in a radio frequency receiver. A radio frequency signal contains both a desirable signal and an undesirable jammer signal. The combined signal is processed with a filter (104) to extract only the undesirable jammer signal. The jammer signal is then added (104) back to the combined signal to effectively cancel the jammer signal. The system may be implemented using a feedforward approach or a feedback approach. The resultant clean signal is processed in a conventional manner.

Abstract: Techniques for processing incoming signals conforming to a plurality of standards or communication formats with a single baseband receive section are disclosed. In one aspect, a plurality of analog processing components are adjusted in response to a format select signal, set according to one of a plurality of supported formats or standards. In another aspect, the operating mode of an A/D converter is tuned in response to the format select signalIn yet another aspect, the response characteristics of a jammer filter are tuned in response to the format select signal. In yet another aspect, the adjustment of the plurality of analog processing components is carried out by varying the frequency of a sample clock in response to the format select signal. Various other aspects are also presented. These aspects have the benefit of allowing a single baseband receive section to be deployed to process analog signals conforming to a plurality of communications standards or formats, in a power and area efficient manner.

Abstract: A polar analog-to-digital converter ADC that can be advantageously used to extract phase and/or frequency information from a pair of input signals. The polar ADC includes first and second scaling elements, a number of comparators, and a decoder. The first scaling element receives and scales a first signal to provide a set of one or more scaled first signals. The second scaling element receives and scales a second signal to provide a set of one or more scaled second signals. Each of the comparators receives and compares a respective pair of scaled first and second signals and provides a comparison output. The decoder receives the comparison outputs from the comparators and generates output data, which can be indicative of the phase and/or frequency of the first and second signals.

Abstract: A two-stage stacked high IIP3 LNA with low current consumption is presented. Low-impedance bias terminations and optimum inter-stage match are used for IIP3 enhancement. A new graphical design technique is introduced for optimizing the linearity trade-offs in two-stage amplifiers and for optimizing the on-chip inter-stage matching network. Also, novel active circuits for bias modulation suppression are discussed. The LNA has been fabricated in a commercial SiGe BiCMOS technology, and measurement results are presented.