Patents by Inventor Peter John Frith

Peter John Frith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220383882
    Abstract: This application relates to methods and apparatus for transfer of multiple digital data streams, especially of digital audio data over a single communications link such as a single wire. The application describes audio interface circuitry comprising a pulse-length-modulation (PLM) modulator. The PLM is responsive to a plurality of data streams (PDM-R, PDM-L), to generate a series of data pulses (PLM) with a single data pulse having a rising and falling edge in each of a plurality of transfer periods defined by a first clock signal (TCLK). The timing of the rising and falling edge of each data pulse is dependent upon a combination of the then current data samples from the plurality of data streams. The duration and position of the data pulse in the transfer window in effect defines a data symbol encoding the data. Circuitry for receiving and extracting the data is also disclosed.
    Type: Application
    Filed: June 21, 2022
    Publication date: December 1, 2022
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John Paul LESSO, Peter John FRITH, John Laurence PENNOCK
  • Patent number: 11417349
    Abstract: This application relates to methods and apparatus for transfer of multiple digital data streams, especially of digital audio data over a single communications link such as a single wire. The application describes audio interface circuitry comprising a pulse-length-modulation (PLM) modulator. The PLM is responsive to a plurality of data streams (PDM-R, PDM-L), to generate a series of data pulses (PLM) with a single data pulse having a rising and falling edge in each of a plurality of transfer periods defined by a first clock signal (TCLK). The timing of the rising and falling edge of each data pulse is dependent upon a combination of the then current data samples from the plurality of data streams. The duration and position of the data pulse in the transfer window in effect defines a data symbol encoding the data. Circuitry for receiving and extracting the data is also disclosed.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: August 16, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: John Paul Lesso, Peter John Frith, John Laurence Pennock
  • Publication number: 20200219522
    Abstract: This application relates to methods and apparatus for transfer of multiple digital data streams, especially of digital audio data over a single communications link such as a single wire. The application describes audio interface circuitry comprising a pulse-length-modulation (PLM) modulator (204). The PLM is responsive to a plurality of data streams (PDM-R, PDM-L), to generate a series of data pulses (PLM) with a single data pulse having a rising and falling edge in each of a plurality of transfer periods defined by a first clock signal (TCLK). The timing of the rising and falling edge of each data pulse is dependent upon on a combination of the then current data samples from the plurality of data streams. The duration and position of the data pulse in the transfer window in effect defines a data symbol encoding the data. Circuitry for receiving and extracting the data is also disclosed.
    Type: Application
    Filed: February 27, 2020
    Publication date: July 9, 2020
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John Paul LESSO, Peter John FRITH, John Laurence PENNOCK
  • Patent number: 10636431
    Abstract: This application relates to methods and apparatus for transfer of multiple digital data streams, especially of digital audio data over a single communications link such as a single wire. The application describes audio interface circuitry comprising a pulse-length-modulation (PLM) modulator (204). The PLM is responsive to a plurality of data streams (PDM-R, PDM-L), to generate a series of data pulses (PLM) with a single data pulse having a rising and falling edge in each of a plurality of transfer periods defined by a first clock signal (TCLK). The timing of the rising and falling edge of each data pulse is dependent upon on a combination of the then current data samples from the plurality of data streams. The duration and position of the data pulse in the transfer window in effect defines a data symbol encoding the data. Circuitry for receiving and extracting the data is also disclosed.
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: April 28, 2020
    Assignee: Cirrus Logic, Inc.
    Inventors: John Paul Lesso, Peter John Frith, John Laurence Pennock
  • Patent number: 9973157
    Abstract: An apparatus and method are disclosed for providing output signal swings that are greater than the supply voltage in a class-D amplifier. The amplifier circuit boosts the voltage across the amplifier load, such as a loudspeaker, by using capacitors to “charge pump” the voltage across the load and thus increase the voltage temporarily. This is done by using two or more output bridges rather than one, and connecting the bridges through the capacitors. For signals of less than the supply voltage, only an inner bridge, similar to a full bridge of the prior art, operates. For signals above the supply voltage, an outer bridge charges capacitors, which are then used to ‘boost’ the voltage on the bridge output for the short period of the Class-D switching period. Thus, only relatively small value boosting capacitors are needed, as they do not need to supply charge for very long.
    Type: Grant
    Filed: September 10, 2016
    Date of Patent: May 15, 2018
    Assignee: ESS Technology, Inc.
    Inventors: Peter John Frith, Yongsheng Xu, A. Martin Mallinson, Robert Lynn Blair
  • Patent number: 9806684
    Abstract: An apparatus and method are disclosed for providing output signal swings that are greater than the supply voltage in a class-D amplifier. The amplifier circuit boosts the voltage across the amplifier load, such as a loudspeaker, by using capacitors to “charge pump” the voltage across the load and thus increase the voltage temporarily. This is done by using two or more output bridges rather than one, and connecting the bridges through the capacitors. For signals of less than the supply voltage, only an inner bridge, similar to a full bridge of the prior art, operates. For signals above the supply voltage, an outer bridge charges capacitors, which are then used to ‘boost’ the voltage on the bridge output for the short period of the Class-D switching period. Thus, only relatively small value boosting capacitors are needed, as they do not need to supply charge for very long.
    Type: Grant
    Filed: September 10, 2016
    Date of Patent: October 31, 2017
    Assignee: ESS Technology, Inc.
    Inventors: Peter John Frith, Yongsheng Xu, A. Martin Mallinson, Robert Lynn Blair
  • Patent number: 9793867
    Abstract: An apparatus and method are disclosed for providing output signal swings that are greater than the supply voltage in a class-D amplifier. The amplifier circuit boosts the voltage across the amplifier load, such as a loudspeaker, by using capacitors to “charge pump” the voltage across the load and thus increase the voltage temporarily. This is done by using two or more output bridges rather than one, and connecting the bridges through the capacitors. For signals of less than the supply voltage, only an inner bridge, similar to a full bridge of the prior art, operates. For signals above the supply voltage, an outer bridge charges capacitors, which are then used to ‘boost’ the voltage on the bridge output for the short period of the Class-D switching period. Thus, only relatively small value boosting capacitors are needed, as they do not need to supply charge for very long.
    Type: Grant
    Filed: October 22, 2016
    Date of Patent: October 17, 2017
    Assignee: ESS Technology, Inc.
    Inventors: Peter John Frith, Yongsheng Xu, A. Martin Mallinson, Robert Lynn Blair
  • Publication number: 20170280244
    Abstract: An approach is disclosed for achieving improved sound quality from mobile ‘hifi’ playback devices by driving compatible headphones in ‘balanced’ or ‘differential’ mode via standard size headphone connectors, while retaining full compliance with legacy jack connections and allowing use of a microphone. When a headphone is connected, a smartphone may determine whether the headphone is one capable of accepting balanced audio signals, or one that uses a conventional 4-pole CTIA or OMTP jack. For a headphone that accepts balanced audio signals, the four poles of a 4-pole jack are used to drive left and right audio channels, and inverted left and right audio channels. For conventional 4-pole jacks, switches in the smartphone adapt the audio output signals to the configuration expected by the headphone and allow the smartphone to receive input from the microphone. A switch may be used to alternate between the balanced and conventional CTIA or OMTP mode.
    Type: Application
    Filed: March 16, 2017
    Publication date: September 28, 2017
    Inventors: Shawn William Scarlett, Peter John Frith
  • Publication number: 20170126187
    Abstract: An apparatus and method are disclosed for providing output signal swings that are greater than the supply voltage in a class-D amplifier. The amplifier circuit boosts the voltage across the amplifier load, such as a loudspeaker, by using capacitors to “charge pump” the voltage across the load and thus increase the voltage temporarily. This is done by using two or more output bridges rather than one, and connecting the bridges through the capacitors. For signals of less than the supply voltage, only an inner bridge, similar to a full bridge of the prior art, operates. For signals above the supply voltage, an outer bridge charges capacitors, which are then used to ‘boost’ the voltage on the bridge output for the short period of the Class-D switching period. Thus, only relatively small value boosting capacitors are needed, as they do not need to supply charge for very long.
    Type: Application
    Filed: September 10, 2016
    Publication date: May 4, 2017
    Inventors: Peter John Frith, Yongsheng Xu, A. Martin Mallinson, Robert Lynn Blair
  • Publication number: 20170111743
    Abstract: An apparatus and method is disclosed for achieving improved sound quality from mobile ‘hifi’ playback devices by driving compatible headphones in ‘balanced’ or ‘differential’ mode via standard size headphone connectors on the device, while retaining full compliance with legacy jack connections and conventional headphones. When a headphone is connected, a smartphone may determine whether the headphone is one capable of accepting balanced audio signals, or one that uses a conventional 3-pole jack or a 4-pole CTIA or OMTP jack. For a headphone that accepts balanced audio signals, the four poles of a 4-pole jack are used to drive left and right audio channels, and inverted left and right audio channels. For conventional 3-pole or 4-pole jacks, switches in the smartphone adapt the audio output signals to the configuration expected by the headphone.
    Type: Application
    Filed: September 10, 2016
    Publication date: April 20, 2017
    Inventors: Peter John Frith, Frederic Schrive, Hwang Soo Son, Dustin Dale Forman
  • Publication number: 20170111017
    Abstract: An apparatus and method are disclosed for providing output signal swings that are greater than the supply voltage in a class-D amplifier. The amplifier circuit boosts the voltage across the amplifier load, such as a loudspeaker, by using capacitors to “charge pump” the voltage across the load and thus increase the voltage temporarily. This is done by using two or more output bridges rather than one, and connecting the bridges through the capacitors. For signals of less than the supply voltage, only an inner bridge, similar to a full bridge of the prior art, operates. For signals above the supply voltage, an outer bridge charges capacitors, which are then used to ‘boost’ the voltage on the bridge output for the short period of the Class-D switching period. Thus, only relatively small value boosting capacitors are needed, as they do not need to supply charge for very long.
    Type: Application
    Filed: September 10, 2016
    Publication date: April 20, 2017
    Inventors: Peter John Frith, Yongsheng Xu, A. Martin Mallinson, Robert Lynn Blair
  • Publication number: 20170111742
    Abstract: An apparatus and method is disclosed for achieving improved sound quality from mobile ‘hifi’ playback devices by driving compatible headphones in ‘balanced’ or ‘differential’ mode via standard size headphone connectors on the device, while retaining full compliance with legacy jack connections and conventional headphones. When a headphone is connected, a smartphone may determine whether the headphone is one capable of accepting balanced audio signals, or one that uses a conventional 3-pole jack or a 4-pole CTIA or OMTP jack. For a headphone that accepts balanced audio signals, the four poles of a 4-pole jack are used to drive left and right audio channels, and inverted left and right audio channels. For conventional 3-pole or 4-pole jacks, switches in the smartphone adapt the audio output signals to the configuration expected by the headphone.
    Type: Application
    Filed: September 10, 2016
    Publication date: April 20, 2017
    Inventors: Dustin Dale Forman, Peter John Frith, Frederic Schrive, Hwang Soo Son
  • Publication number: 20170104462
    Abstract: An apparatus and method are disclosed for providing output signal swings that are greater than the supply voltage in a class-D amplifier. The amplifier circuit boosts the voltage across the amplifier load, such as a loudspeaker, by using capacitors to “charge pump” the voltage across the load and thus increase the voltage temporarily. This is done by using two or more output bridges rather than one, and connecting the bridges through the capacitors. For signals of less than the supply voltage, only an inner bridge, similar to a full bridge of the prior art, operates. For signals above the supply voltage, an outer bridge charges capacitors, which are then used to ‘boost’ the voltage on the bridge output for the short period of the Class-D switching period. Thus, only relatively small value boosting capacitors are needed, as they do not need to supply charge for very long.
    Type: Application
    Filed: October 22, 2016
    Publication date: April 13, 2017
    Inventors: Peter John Frith, Yongsheng Xu, A. Martin Mallinson, Robert Lynn Blair
  • Publication number: 20160358617
    Abstract: This application relates to methods and apparatus for transfer of multiple digital data streams, especially of digital audio data over a single communications link such as a single wire. The application describes audio interface circuitry comprising a pulse-length-modulation (PLM) modulator (204). The PLM is responsive to a plurality of data streams (PDM-R, PDM-L), to generate a series of data pulses (PLM) with a single data pulse having a rising and falling edge in each of a plurality of transfer periods defined by a first clock signal (TCLK). The timing of the rising and falling edge of each data pulse is dependent upon on a combination of the then current data samples from the plurality of data streams. The duration and position of the data pulse in the transfer window in effect defines a data symbol encoding the data. Circuitry for receiving and extracting the data is also disclosed.
    Type: Application
    Filed: August 22, 2016
    Publication date: December 8, 2016
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John Paul LESSO, Peter John FRITH, John Laurence PENNOCK
  • Patent number: 9462368
    Abstract: An apparatus is disclosed for inputting digital data on the output channel(s) of an audio subsystem in an audio device, without interfering with normal operation of the audio subsystem. The described circuit includes a resistive element in parallel with the expected load device, such as a headphone or speaker. The resistive element receives a modulated digital signal from a data source or a switch, and the instantaneous current through the resistive element due to the modulated digital signal is reflected in a current feedback mechanism of the audio subsystem. Demodulation logic retrieves the digital signal from the current measured by the current feedback mechanism. A capacitor is provided to prevent the current in the resistive element from the digital signal from impacting the average DC current that the feedback mechanism uses to evaluate the load device.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: October 4, 2016
    Assignee: ESS Technology, Inc.
    Inventors: A. Martin Mallinson, Dustin Dale Forman, Robert Lynn Blair, Peter John Frith
  • Patent number: 9424849
    Abstract: Circuitry for transferring multiple digital data streams, e.g. digital audio data, over a single communications link such as a single wire. A pulse-length-modulator is responsive to a plurality of data streams to generate a series of data pulses with a single data pulse having a rising and falling edge in each of a plurality of transfer periods defined by a first clock signal. The timing of the rising and falling edge of each data pulse is dependent on a combination of the then current data samples from the plurality of data streams. The duration and position of the data pulse in the transfer window in effect defines a data symbol encoding the data. An interface receives the stream of data pulses, and data extraction circuitry samples the data pulse to determine which of the possible data symbols the pulse represents and determines a data value for at least one received data stream.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: August 23, 2016
    Assignee: Cirrus Logic, Inc.
    Inventors: John Paul Lesso, Peter John Frith, John Laurence Pennock
  • Patent number: 9391508
    Abstract: A bipolar output charge pump circuit having a network of switching paths for selectively connecting an input node and a reference node for connection to an input voltage, a first pair of output nodes and a second pair of output nodes, and two pairs of flying capacitor nodes, and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors connected to the two pairs of flying capacitor nodes, to provide a first bipolar output voltage at the first pair of output nodes and a second bipolar output voltage at the second pair of bipolar output nodes.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: July 12, 2016
    Assignee: Cirrus Logic Inc.
    Inventors: John Paul Lesso, Peter John Frith, John Laurence Pennock
  • Publication number: 20160119710
    Abstract: An apparatus is disclosed for inputting digital data on the output channel(s) of an audio subsystem in an audio device, without interfering with normal operation of the audio subsystem. The described circuit includes a resistive element in parallel with the expected load device, such as a headphone or speaker. The resistive element receives a modulated digital signal from a data source or a switch, and the instantaneous current through the resistive element due to the modulated digital signal is reflected in a current feedback mechanism of the audio subsystem. Demodulation logic retrieves the digital signal from the current measured by the current feedback mechanism. A capacitor is provided to prevent the current in the resistive element from the digital signal from impacting the average DC current that the feedback mechanism uses to evaluate the load device.
    Type: Application
    Filed: October 22, 2015
    Publication date: April 28, 2016
    Inventors: A. Martin Mallinson, Dustin Dale Forman, Robert Lynn Blair, Peter John Frith
  • Patent number: 9136755
    Abstract: A bipolar output charge pump circuit having a network of switching paths 110 for selectively connecting an input node (VV) and a reference node (VG) for connection to an input voltage, a first pair of output nodes (VP, VN), two pairs of flying capacitor nodes (CF1A, CF1B; CF2A, CF2B), and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors (CF1, CF2) connected to the two pairs of flying capacitor nodes, to provide a first mode and a second mode when in use with two flying capacitors connected to the flying capacitor nodes, wherein at least the first mode corresponds to a bipolar output voltage of +/?3VV, +/?VV/5 or +/?VV/6.
    Type: Grant
    Filed: December 23, 2011
    Date of Patent: September 15, 2015
    Assignee: Cirrus Logic International Semiconductor Ltd.
    Inventors: John Paul Lesso, Peter John Frith, John Laurence Pennock
  • Publication number: 20150070082
    Abstract: A bipolar output charge pump circuit having a network of switching paths for selectively connecting an input node and a reference node for connection to an input voltage, a first pair of output nodes and a second pair of output nodes, and two pairs of flying capacitor nodes, and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors connected to the two pairs of flying capacitor nodes, to provide a first bipolar output voltage at the first pair of output nodes and a second bipolar output voltage at the second pair of bipolar output nodes.
    Type: Application
    Filed: November 14, 2014
    Publication date: March 12, 2015
    Inventors: John Paul Lesso, Peter John Frith, John Laurence Pennock