Abstract: A measurement circuit is provided for measuring the resistance of a variable resistance element biased with an external voltage supply. The measurement circuit includes an analog-to-digital converter (ADC) and a reference generator connected with the ADC. The ADC is operative to receive a reference voltage and a first voltage developed across the variable resistance element, and to generate a digital output signal indicative of a relationship between the first voltage and the reference voltage. The reference generator is operative to generate the reference voltage as a function of the external voltage supply.

Abstract: A measurement circuit is provided for measuring the resistance of a variable resistance element biased with an external voltage supply. The measurement circuit includes an analog-to-digital converter (ADC) and a reference generator connected with the ADC. The ADC is operative to receive a reference voltage and a first voltage developed across the variable resistance element, and to generate a digital output signal indicative of a relationship between the first voltage and the reference voltage. The reference generator is operative to generate the reference voltage as a function of the external voltage supply.

Abstract: A circuit is disclosed which adjusts the phase of a signal within an LC sinusoidal or a ring or other capacitive oscillator. The circuit uses FETs as capacitors. The gates of the FETs are connected to the capacitive node of the oscillator. The variable voltage source changes the state of the FET from depleted to inverted mode or from inverted to depleted mode which in turn dramatically changes the capacitance of the FET. The change of state exists for only a few clock cycles, typically less than five cycles, so that only the capacitance within the oscillator is instantaneously affected which changes adds as incremental/decremental frequency to adjust only the phase of the oscillation frequency. In this fashion, the average oscillation frequency not affected.

Abstract: A circuit is disclosed which uses less power and is responsive to high frequencies which can detect if a signal has sufficient amplitude. The signal of interest is input to an active semiconductor device. The other inputs to the active device are set by the value of the amplitude which the signal must be less than/greater than. The circuit is especially useful in an oscillator which generates high frequency clock signals to determine if the clock signals have sufficient amplitude to drive the electronics.

Abstract: A combined read and write VCO for data channels is disclosed. The combined read and write VCO for data channels shares a common loop capacitor while providing optimal read and write VCO loop responses, and allows the VCO to relock to the write timebase after a read very quickly while maintaining an accurate timebase. The combined read and write VCO includes an oscillator providing an output signal having a frequency that varies proportionately to an oscillator input signal and an adjustable voltage source, the adjustable voltage source having a first configuration for a write mode and a second configuration for a read mode, and the adjustable voltage source providing the oscillator input signal to the oscillator in response to receiving an input current signal. The adjustable voltage source includes a first and second capacitor coupled in series and a switch coupled across the second capacitor, the switch being open to provide the first configuration and closed to provide the second configuration.

Abstract: An apparatus and method for estimating an amplitude of a readback signal obtained from a data storage medium and input to a gain modifying amplifier involves sensing an amplifier output signal in response to a readback signal applied to the amplifier. An amplifier control signal is produced which is representative of a difference between the amplifier output signal and a reference signal. A compensation signal associated with a temperature coefficient of amplifier gain is generated, and an estimate signal indicative of the amplitude of the readback signal is produced using the compensation signal. The estimate signal is representative of readback signal amplitude when the estimate signal has a magnitude equivalent to that of the difference signal and a polarity opposite that of the difference signal.