Patents by Inventor Peter Ka-Fai Chow

Peter Ka-Fai Chow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7502366
    Abstract: A network switch includes network switch ports, each including a port filter configured for detecting user-selected attributes from a received layer 2 type data frame. Each port filter, upon detecting a user-selected attribute in a received layer 2 type data frame, sends a signal to a switching module indicating the determined presence of the user-selected attribute, enabling the switching module to generate a switching decision based on the corresponding user-selected attribute and based on a corresponding user-defined switching policy. The switching policy may specify a priority class, or a guaranteed quality of service (e.g., a guaranteed bandwidth), ensuring that the received layer 2 type data frame receives the appropriate switching support. The user-selected attributes for the port filter and the user-defined switching policy for the switching module are programmed by a host processor.
    Type: Grant
    Filed: May 23, 2000
    Date of Patent: March 10, 2009
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bahadir Erimli, Gopal S. Krishna, Chandan Egbert, Peter Ka-Fai Chow, Mrudula Kanuri, Shr-Jie Tzeng, Somnath Viswanath, Xiaohua Zhuang
  • Patent number: 7295562
    Abstract: A network device identifies priority level information for data frames it receives. The network device includes input ports, a memory, an action generator, and a port vector queue. The input ports receive the data frames. Each of the received data frames specifies one or more classes of service. The memory stores priority level information corresponding to each of the classes of service. The action generator generates an action tag for each of the received data frames. The port vector queue uses the action tag from the action generator for each of the received data frames to access the memory to identify the priority level information associated with the received data frame.
    Type: Grant
    Filed: March 26, 2001
    Date of Patent: November 13, 2007
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Yatin R. Acharya, Bahadir Erimli, Peter Ka-Fai Chow
  • Patent number: 7072300
    Abstract: A multiport switch includes an action generator that creates action tags describing how data frames received by the switch are to be forwarded. A port filter generates policy equations and a differential services code point (DSCP) signal for the received packets. A decoder and an action memory in the action generator choose the highest priority policy equation and use the policy equation to look up priority information for the data frame. A state machine in the action generator receives the DSCP signal. A result tag interface receives a DSCP field from the state machine and the priority information from the action memory. Based on these signals, the result tag interface constructs the final action tag.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: July 4, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Peter Ka-Fai Chow, Shr-Jie Tzeng
  • Patent number: 7016352
    Abstract: A multiport switching device includes an Internal Rules Checker (IRC) that determines forwarding addresses for packets received at the device. The determined forwarding addresses may include a new MAC destination address that is to substituted for the MAC destination address of the received packet. In one implementation, the new MAC destination address is transmitted from the IRC to the dequeuing logic by transmitting pairs of adjacent words through the switch output queues. In other implementations, the new MAC destination address is transmitted from the IRC to the dequeuing logic by transmitting an index field to the output queuing logic or by having the IRC write the new MAC destination address directly to memory.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: March 21, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Peter Ka-Fai Chow, Somnath Viswanath, Shr-Jie Tzeng
  • Patent number: 6996124
    Abstract: The present invention provides a method for supporting sleep mode wake up in a home phone line network. The method includes: detecting a limited automatic repeat request (LARQ) header in a frame; stripping the LARQ header and a frame check sequence (FCS) in the frame; recalculating the FCS for the stripped frame; and adding the recalculated FCS to the stripped frame. The method strips the LARQ header from a HPNA frame before it is sent to an Ethernet controller. By stripping the LARQ header, the Ethernet controller will correctly find the set byte location for the wake pattern and attempts to match the bit pattern with the wake pattern. In this manner, sleep mode wake up is supported.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: February 7, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Peter Ka-Fai Chow
  • Patent number: 6990114
    Abstract: A network device includes a port filter, a first logic device, and a second logic device. The port filter receives a data frame and generates first data relating to the data frame. The first logic device generates second data for the received data frame. The second logic device receives the first data and the second data, determines whether the first data contains a valid first priority value, and assigns the valid first priority value to the data frame when the first data contains the valid first priority value. When the first data does not contain a valid first priority value, the second logic device determines whether the second data contains a valid second priority value, and assigns the valid second priority value to the data frame when the second data contains the valid second priority value.
    Type: Grant
    Filed: March 26, 2001
    Date of Patent: January 24, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bahadir Erimli, Peter Ka-Fai Chow, Yatin R. Acharya, Shr-Jie Tzeng
  • Patent number: 6990101
    Abstract: A network device includes a receive module, a port filter, an action generator, processing logic, and a transmit module. The receive module receives a packet and detects whether the packet includes a router media access control (MAC) destination address. The port filter stores Internet Protocol (IP) source and destination addresses, determines whether an IP destination address associated with the packet has been stored, and identifies policy handling information for the packet. The action generator generates, based on the policy handling information, forwarding information for the packet. The forwarding information includes at least a port vector, and, when the IP destination address associated with the packet has been stored, a replacement MAC destination address. The processing logic determines a replacement MAC destination address when the IP destination address associated with the packet has not been stored. The transmit module transmits the packet based on the replacement MAC destination address.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: January 24, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Peter Ka-Fai Chow, Shr-Jie Tzeng
  • Patent number: 6963565
    Abstract: A network switch, configured for performing layer 2 and layer 3 switching in an Ethernet (IEEE 802.3) network without blocking of incoming data packets, includes a network switch port having a filter (i.e., a packet classifier module) configured for evaluating an incoming data packet on an instantaneous basis, immediately upon receipt at the network switch port. The filter performs simultaneous comparisons between the incoming data stream of the data packet and multiple templates configured for identifying respective data protocols. Each template is composed of a plurality of min terms, wherein each min term specifies a prescribed comparison operation within a selected data byte of the incoming data packet. The templates may be programmed by a user and stored in an internal min term memory. Moreover, the multiple simultaneous comparisons enable the network switch to perform layer 3 switching for 100 Mbps and gigabit networks without blocking in the network switch.
    Type: Grant
    Filed: August 14, 2000
    Date of Patent: November 8, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Gopal S. Krishna, Peter Ka-Fai Chow, Shr-Jie Tzeng, Somnath Viswanath
  • Patent number: 6963571
    Abstract: A multiport network device includes output port logic, priority logic, a memory, and memory logic. The output port logic generates output port data that identifies output ports to transmit received packets. The priority logic generates priority data that identifies priorities of the received packets. The memory stores the output port data from the output port logic and the priority data from the priority logic. The memory logic receives priority data relating to one of the received packets from the output port logic, determines whether the memory stores output port data relating to the packet, ignores the received priority data when the memory stores no output port data relating to the packet, and when the memory stores output port data relating to the packet, transmits the received priority data and the stored output port data to the identified output port.
    Type: Grant
    Filed: March 5, 2001
    Date of Patent: November 8, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Somnath Viswanath, Bahadir Erimli, Peter Ka-Fai Chow, Yatin R. Acharya
  • Patent number: 6963536
    Abstract: A network device that controls the communication of data frames between stations performs an admission control procedure to reduce congestion on the network device. The network device receives data frames from a number of receive ports and reads a portion of a received data frame to determine a priority associated with the received data frame. When admission control is enabled, the network device determines whether to drop the received data frame based on the priority or some other predetermined criteria.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: November 8, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Shr-Jie Tzeng, Peter Ka-Fai Chow
  • Patent number: 6954427
    Abstract: A network device that controls the communication of data frames between stations includes a memory that stores frame pointers that point to addresses in an external memory. The data frames are stored in the external memory while the network device generates frame forwarding information for the respective data frames. The network device divides the available frame pointers into a number of categories corresponding to priorities associated with the data frames. When a frame is received at the network device, frame processing logic determines the priority of the data frame and checks whether a frame pointer corresponding to that particular priority is available. If no frame pointer corresponding to that priority is available, the multiport switch drops the data frame.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: October 11, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Somnath Viswanath, Gopal S. Krishna, Peter Ka-Fai Chow, Bahadir Erimli
  • Patent number: 6944174
    Abstract: A multiport device includes a time-stamping component that appends a time-stamp value to voice packets. Output queues use the time-stamp value to monitor the time the packet spends in the output queue. If the packet is in the queue for greater than a predetermined amount of time, a time-stamp control component expedites the processing of the packet. In this manner, jitter introduced into the voice packet by variable length delays in the network device can be controlled.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: September 13, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Peter Ka-Fai Chow
  • Patent number: 6925089
    Abstract: The present invention provides a network state machine which supports the three network states of the Home Phone Line Networking Alliance specification version 2.0 (HPNA 2.0) using two network states has been disclosed. When a station is in the V1M2 mode, instead of transmitting this frame in the 10M8 format frame with the gap frame, the frame is transmitted in the 1M8 format frame without any gaps in the frame. With this, the three network state equations of HPNA 2.0 collapses into two equations. With only two network states, the complexity of the network state machine is reduced, and a Physical Layer (PHY) which supports only the two network states may be used.
    Type: Grant
    Filed: May 2, 2001
    Date of Patent: August 2, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Peter Ka-Fai Chow, William Young
  • Patent number: 6909725
    Abstract: A network state machine which implements the three network states of HPNA 2.0 in hardware has been disclosed. The network state machine implements the three network states using two network states. When a station is in the V1M2 mode, instead of transmitting this frame in the 10M8 format frame with the gap frame, the frame is transmitted in the 1M8 format frame without any gaps in the frame. By implementing this in hardware, the network state machine has a faster response time.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: June 21, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Peter Ka-Fai Chow
  • Patent number: 6885666
    Abstract: A network switch port includes a port filter configured to receive at least a portion of a data frame including layer 3 information and to generate a tag result. A queue block is configured for transferring the data frame to a buffer memory. A switch fabric is configured for receiving the tag result and for performing a frame forwarding switching decision based on the tag result and monitoring of the transfer of the data frame. A synchronizing device is configured to synchronize the transfer of a valid tag result to the switch fabric with the transfer of the at least a portion of the data frame to the buffer memory based on a signal from the queue indicating a status of the transfer of the portion of the data frame to the buffer memory.
    Type: Grant
    Filed: August 14, 2000
    Date of Patent: April 26, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Peter Ka-Fai Chow, Somnath Viswanath
  • Patent number: 6839351
    Abstract: A multiport network device includes output ports, internal rules checking logic, a port filter, and input ports. The input ports receive data frames and transfer the data frames to the internal rules checking logic and the port filter. The internal rules checking logic determines the appropriate output ports for the frame. At potentially the same time, the port filter determines priority information for the frame. The port filter informs the internal rules checking logic when it has completed determining the priority information by transmitting an end-of-frame signal to the internal rules checking logic. In response, if the internal rules checking logic has completed determining the output ports for the frame, it assembles a frame descriptor corresponding to the frame and transmits the frame descriptor to the appropriate output port(s).
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: January 4, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Peter Ka-Fai Chow, Bahadir Erimli, Somnath Viswanath, Gopal S. Krishna
  • Patent number: 6807183
    Abstract: A network switch, configured for performing layer 2 and layer 3 switching in an Ethernet (IEEE 802.3) network without blocking of incoming data packets, includes a network switch port having a filter (i.e., a packet classifier module) configured for evaluating an incoming data packet on an instantaneous basis. The filter performs simultaneous comparisons between the incoming data stream of the data packet and multiple templates configured for identifying respective data protocols. Each template is composed of a plurality of min terms, wherein each min term specifies a prescribed comparison operation within a selected data byte of the incoming data packet. The packet classifier includes a separate FIFO for storing the payload of the layer 2 data frame (e.g., the IP packet), and buffer read logic that enables the packet classifier to read selected portions of the payload as it is received by the network switch port.
    Type: Grant
    Filed: May 9, 2000
    Date of Patent: October 19, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Peter Ka-Fai Chow, Shr-Jie Tzeng
  • Patent number: 6804234
    Abstract: A multiport switching device includes an Internal Rules Checker (IRC) that determines forwarding information for packets received at the device. The IRC uses an internal address lookup table to determine the forwarding information when the received packet conforms to version four of the Internet Protocol (IPv4). When the received packet has a longer destination address, consistent with version six of the Internet Protocol (IPv6), the IRC uses an externally located CPU to assist the IRC in determining the forwarding information.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: October 12, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Peter Ka-Fai Chow
  • Patent number: 6741594
    Abstract: A network switch, configured for performing layer 2 and layer 3 switching in an Ethernet (IEEE 802.3) network without blocking of incoming data packets, includes a network switch port having a filter (i.e., a packet classifier module) configured for evaluating an incoming data packet on an instantaneous basis. The filter performs simultaneous comparisons between the incoming data stream of the data packet and multiple templates configured for identifying respective data attributes. Each template is composed of a plurality of min terms, wherein each min term specifies a prescribed comparison operation within a selected data byte of the incoming data packet. The templates may be programmed by a user and stored in an internal min term memory. Hence, the filter can identify selected attributes, such as whether the layer 2 packet includes an SNMP packet or an HTTP packet, regardless of whether the IP frame is in IPv4 format or IPv6 format.
    Type: Grant
    Filed: June 15, 2000
    Date of Patent: May 25, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Shr-jie Tzeng, Peter Ka-Fai Chow
  • Patent number: 6728213
    Abstract: A network device that controls the communication of data frames between stations performs an admission control procedure to reduce congestion on the network device. The network device receives data frames on its receive ports. When the network device detects congestion, the network device enables admission control and reads a portion of a data frame to determine the nature of the data included in the data frame. The network device then determines whether to drop the received data frame based on the nature of the data included in the data frame. The network device may also determine a priority associated with the data frame and selectively drop data frames based on the nature of the data included in the data frame and the priority.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: April 27, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Shr-Jie Tzeng, Peter Ka-Fai Chow