Abstract: A method for managing records in an object-oriented database is disclosed. Modified representations of data in fields of records is generated in response to patterns in the data. The modified representations of the data is compressed utilizing similarities in the modified representations of the data.

Abstract: A method for managing records in an object-oriented database is disclosed. Modified representations of data in fields of records is generated in response to patterns in the data. The modified representations of the data is compressed utilizing similarities in the modified representations of the data.

Abstract: A programmable logic integrated circuit device has a plurality of regions of programmable logic disposed on the device in a plurality of intersecting rows and columns of such regions. Interconnection resources (e.g., interconnection conductors, signal buffers/drivers, programmable connectors, etc.) are provided on the device for making programmable interconnections to, from, and/or between the regions. At least some of these interconnection resources are provided in two forms that are architecturally similar (e.g., with similar and substantially parallel routing) but that have significantly different signal propagation speed characteristics. For example, a major or larger portion of such dual-form interconnection resources may have what may be termed normal signal speed, while a smaller minor portion may have significantly faster signal speed. Secondary (e.g.

Abstract: Generating enable and data input signals for flip-flops used for implementing complex logic functions on a programmable logic device. The method includes ascertaining a behavioral logic equation that defines a logic function to be implemented on the programmable logic device, the logic function having one or more inputs and an output. A truth table is then derived from the behavioral logic equation. The truth table includes one or more minterms that collectively define all the possible states of the one or more inputs and the output of the logic function. Positive and negative cofactors of the logic function are defined from the minterms of the truth table. The defined positive and negative cofactors are used to ascertain an enable signal used to enable a flip-flop and logic circuitry to provide to a data input of the flip-flop. Together, the logic circuitry and the enable signal control the operation of the flip-flop to implement the logic function on the programmable logic device.

Abstract: Circuitry is disclosed for emulating asynchronous clear on each of a read address register of a memory cell and a data output register of a memory cell such that the memory cell can be defined in a memory structure that does not support asynchronous clear capability. The emulation includes defining the memory cell to have a registered read address input and a data output connected to an input of a multiplexer. The register connected to the read address input of the multiplexer does not include an asynchronous clear connection. The data transmitted from the memory cell to the multiplexer is output from the multiplexer when an asynchronous clear signal has not been asserted. However, the multiplexer is further connected to output either null data or a ground signal in lieu of the data transmitted from the memory cell when an asynchronous clear signal has been asserted.