Patents by Inventor Peter L. Young

Peter L. Young has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5945254
    Abstract: A method for manufacturing a multichip module deposited substrate board utilizing alternating layers of high density thin-film metal and either preimidized or non-preimidized organic polymer insulating material wherein the insulating material is cured during manufacture using either ultraviolet radiation, ion beam radiation or electron beam radiation. This method eliminates subjecting the in-process substrate board to temperatures in excess of the recrystalization temperature of the thin-film metal, thereby eliminating the source of warpage and metal interdiffusion and corrosion at the metal to insulating material interface. This process enables successful manufacture of large format multichip module deposited substrate boards in sizes up to approximately 24 inches square.
    Type: Grant
    Filed: December 18, 1996
    Date of Patent: August 31, 1999
    Assignee: The Boeing Company
    Inventors: Chung-Ping Chien, Jean A. Nielsen, Peter L. Young
  • Patent number: 4996584
    Abstract: A method for fabricating thin-film multilayer interconnect signal planes for connecting semiconductor integrated circuits (chips) is described. In this method, a first pattern of thin-film metallic interconnect lines is formed on a surface of a substrate. Then a first dielectric layer is formed over the entire surface of the substrate covering the pattern of thin-film metallic interconnect lines. A portion of the dielectric layer is then removed to expose the thin-film metallic interconnect lines so that a series of trenches is formed above each interconnect line. The interconnect lines are then electroplated to form a series of thicker metal interconnect lines such that the thicker metal interconnect lines and the dielectric layer form a substantially planar surface. This process can then be repeated in its entirely to form a plurality of interconnect signal planes. In the preferred embodiment, metallic vias are provided between each layer of metallic interconnect lines for electrical connection purposes.
    Type: Grant
    Filed: October 13, 1988
    Date of Patent: February 26, 1991
    Assignee: Gould, Inc.
    Inventors: Peter L. Young, Jay Cech, Kin Li
  • Patent number: 4974048
    Abstract: An integrated circuit that may be modified or repaired following its fabrication. The integrated circuit (80/80'/80") includes two chips (82, 84) having terminals (88, 90, 92, 94, 96, and 98), which are interconnected by first conductors (100, 102, 108, 110, 114, and 116) and second conductors (104, 112, and 118). Switchable connectors (126, 128) can be selectively activated to convey current through portions of two bus conductors (120, 122), and/or through a redundant line (124), to interconnect specific terminals of the two chips in order to bypass a break or short circuit in the first and second conductors. In addition, switchable disconnectors (134, 136) may be selectively activated to create discontinuity in specific conductors. A focused laser beam (162) is used to activate selected switchable connectors and disconnectors by heating them, thereby changing the current path interconnecting the terminals of the two chips.
    Type: Grant
    Filed: March 10, 1989
    Date of Patent: November 27, 1990
    Assignee: The Boeing Company
    Inventors: Kishore K. Chakravorty, Peter L. Young
  • Patent number: 4855871
    Abstract: A thin film interconnect module utilizes a plurality of electroplated conductors disposed in one or more signal layers and surrounded by a dielectric having substantially the same thickness as the conductors to form a substantially planar layer. A metal/dielectric film is employed electrically to interconnect with various ones of the conductors during the electroplating process. After electroplating, selected ones of the electrical interconnections are broken by heating or irradiating selected ones of the interconnections. A dielectric-like film composed of microscopic non-contacting metal islands is used to link conductors that may subsequently need to be electrically connected, the electrical connection being achieved by melting the islands to form a continuous metal film. Interconnections between different planar layers may be achieved by the use of plated through holes. The process permits high density, high aspect ratio conductors to be fabricated on a multi-layer interconnect module.
    Type: Grant
    Filed: January 11, 1989
    Date of Patent: August 8, 1989
    Assignee: Optical Materials, Inc.
    Inventor: Peter L. Young
  • Patent number: 4816287
    Abstract: An optical recording media having a thermally insulating film to minimize heat loss wherein the thickness of the film is not critical for recording. The thermally insulating film is disposed between a metal coated substrate and a dielectric-like film to form the optical recording media. When a spot on the dielectric-like film is exposed to a focused laser the coloration thereof changes to store multiple bits of information at a single spot.
    Type: Grant
    Filed: August 30, 1985
    Date of Patent: March 28, 1989
    Assignee: Optical Materials, Inc.
    Inventor: Peter L. Young
  • Patent number: 4777126
    Abstract: An optical recording media formed of a composite film the coloration of which changes when exposed to a focused laser to store multiple bits of information at a single spot. The media is formed by depositing a metal film on a substrate; oxidizing a layer of the metal film to form an amorphous film; and depositing a dielectric-like film on the amorphous film.
    Type: Grant
    Filed: August 30, 1985
    Date of Patent: October 11, 1988
    Assignee: Optical Materials, Inc.
    Inventor: Peter L. Young
  • Patent number: 4727234
    Abstract: An apparatus for repairing both clear and opaque defects in a photomask having a metal film pattern on a glass plate in which a visible laser light source is pulsed at selected frequencies to direct an optically focused laser beam into a gas sealed cell containing a mask. At one frequency, the laser pulses ablate opaque mask defects. At another frequency, and with the cell filled with a metal bearing gas, the laser beam causes thermal decomposition of the gas and deposition of metal to cure clear defects.
    Type: Grant
    Filed: June 27, 1986
    Date of Patent: February 23, 1988
    Assignee: Gould Inc.
    Inventors: Modest M. Oprysko, Peter L. Young, Mark W. Beranek
  • Patent number: 4705606
    Abstract: A method for fabricating thin-film multilayer interconnect signal planes for connecting semiconductor integrated circuits is described. In this method, a first pattern of thin-film metallic interconnect lines is formed on a surface of a substrate. Then a first dielectric layer is formed over the entire surface of the substrate covering the pattern of thin-film metallic interconnect lines. A portion of the dielectric layer is then removed to expose the thin-film metallic interconnect lines so that a series of trenches is formed above each interconnect line. The interconnect lines are then electroplated to form a series of thicker metal interconnect lines such that the thicker metal interconnect lines and the dielectric layer form a substantially planer surface. This process can then be repeated in its entirely to form a plurality of interconnect signal planes. In the preferred embodiment, metallic vias are provided between each layer of metallic interconnect lines for electrical connection purposes.
    Type: Grant
    Filed: January 31, 1985
    Date of Patent: November 10, 1987
    Assignee: Gould Inc.
    Inventors: Peter L. Young, Jay Cech, Kin Li
  • Patent number: 4698662
    Abstract: A package for thermal dissipation of heat from multiple integrated circuit chips is described. The package includes a silicon substrate for electrical connection to silicon integrated-circuit chips. The silicon substrate provides a high degree of thermal dissipation of heat generated by the chips. In addition, the invention comprehends that the silicon substrate is attached to a heat dissipating means. In the preferred embodiment, the heat dissipating means includes a metal heat sink. The package is capable of dissipating up to six watts per square centimeter of heat from the chips.
    Type: Grant
    Filed: February 5, 1985
    Date of Patent: October 6, 1987
    Assignee: Gould Inc.
    Inventors: Peter L. Young, Chiu-Chao Chen
  • Patent number: 4681778
    Abstract: A method and apparatus for making electrical connections between conductors on a substrate utilizes a dielectric-like metal film deposited on the substrate interconnecting the conductors to be connected. The dielectric-like film is deposited in the form of microscopic islands or columns that are spaced by microscopic distances, thus making the film non-conductive when deposited. When an electrical connection is desired, the dielectric-like film is melted by localized heating, for example, by a focused laser, thereby melting the individual metal islands and permitting them to flow together to make the film conductive.
    Type: Grant
    Filed: November 14, 1985
    Date of Patent: July 21, 1987
    Assignee: Optical Materials, Inc.
    Inventor: Peter L. Young
  • Patent number: 4661214
    Abstract: A method and apparatus for selectively disconnecting two electrical conductors either on the surface or below the surface of a semiconductor chip or a thin film interconnection module connecting several semiconductor chips utilizes a thin metal film such as a silver film that is deposited over the ends of two conductors that it may become necessary to disconnect in the future. An insulating layer, such as a silver halide film, having the capability of absorbing the silver film under irradiation or upon heating is deposited over the silver film. Before irradiation or heating, the silver film provides a low resistance electrical connection between the two conductors. When it is desired to disconnect the two conductors, the insulating layer is irradiated by a focused source such as a laser, thus causing the insulating layer to absorb the metal film, thereby breaking the electrical connection between the conductors.
    Type: Grant
    Filed: December 11, 1985
    Date of Patent: April 28, 1987
    Assignee: Optical Materials, Inc.
    Inventor: Peter L. Young
  • Patent number: 4592975
    Abstract: A method for repairing clear defects on a photomask. The method includes the steps of coating the photomask with a positive photoresist; exposing the photoresist to a laser beam for localized heating thereof to a temperature above 500.degree. C. to darken or char the polymer; and removing the unexposed polymer from the photomask. The method may also include the intermediate step of heating the polymer to a temperature between 200.degree. C. and 500.degree. C. to brown the polymer before the polymer is exposed to the laser which heats it to a temperature above 500.degree. C.
    Type: Grant
    Filed: June 20, 1984
    Date of Patent: June 3, 1986
    Assignee: Gould Inc.
    Inventors: Peter L. Young, Modest M. Oprysko, Mark W. Beranek
  • Patent number: 4496648
    Abstract: During the preparation of a Josephson junction device, one of the steps for making a base electrode is to deposit a superconducting material on a substrate and to anneal the deposited material to make it a continuous homogeneous polycrystalline grain-like electrode material. Ordinarily, the base electrode and the counter electrode materials are deposited in a vacuum system at a vacuum pressure which is below one.times.10.sup.-6 torr to remove all contaminants such as oxygen, oxides of carbon and water vapor. It has been discovered that depositing conventional superconducting base electrode and counter electrode materials in the presence of an inert gas at much high vacuum pressures around 20.times.10-3 torr produce a superior lead-gold superconductive electrode which is substantially immune to thermal cycling.
    Type: Grant
    Filed: March 26, 1982
    Date of Patent: January 29, 1985
    Assignee: Sperry Corporation
    Inventor: Peter L. Young
  • Patent number: 4486464
    Abstract: During the manufacture of Josephson junction devices, it is necessary to provide superconducting layers for electrodes. During the manufacture of semiconductors, it is necessary to provide conductive paths and leads. A layer of conducting metal or superconducting metal may be vacuum deposited in such a manner that any predetermined pattern or shape of normally conducting metal is made transversely non-conducting. The layer metal which is transversely non-conductive is vacuum deposited in the presence of an inert gas at a pressure which is high enough to cause the evaporated and deposited metal to form islands of conductive metal separated by insulating voids to provide gross electrical anisotropy.
    Type: Grant
    Filed: September 27, 1982
    Date of Patent: December 4, 1984
    Assignee: Sperry Corporation
    Inventor: Peter L. Young
  • Patent number: 4474828
    Abstract: A novel method of depositing the oxide barrier junction on a base electrode of a Josephson junction device is provided. An ionized oxygen plasma region is generated juxtaposed the surface of the base electrode to be oxidized. The pressure of the oxygen in the vacuum chamber is held at a predetermined high pressure where the zero voltage supercurrent is found to be independent of oxygen pressure variations and the flow of oxygen through the vacuum chamber is stabilized at the optimum minimum necessary for growth of the oxide barrier junction. The oxide barrier junctions so produced have consistent and predictable supercurrent densities.
    Type: Grant
    Filed: March 30, 1983
    Date of Patent: October 2, 1984
    Assignee: Sperry Corporation
    Inventors: Peter L. Young, Richard M. Josephs, John A. Coleman
  • Patent number: 4459823
    Abstract: An apparatus comprising a rotating substrate holder is provided. The rotating substrate holder is hollow and adapted to receive liquid gas such as nitrogen to cool the substrate to cryogenic temperatures. The novel substrate holder is supported inside of a vacuum chamber by a thin wall tube which is sealed with a liquid rotating seal at the point where it passes completely through the top wall of the vacuum chamber. The novel thin wall tube support provides access to the hollow substrate holder from outside the vacuum chamber and provides temperature isolation of the liquid in the substrate holder so that the liquid rotating seals are maintained at operable elevated temperatures.
    Type: Grant
    Filed: March 30, 1983
    Date of Patent: July 17, 1984
    Assignee: Sperry Corporation
    Inventors: Richard M. Josephs, Ronald A. Flowers, Peter L. Young
  • Patent number: 4456506
    Abstract: An improved method of anodization of thin films for the fabrication of superconducting devices. An electrically conducting contact layer is formed over a substrate between an electrically conducting object layer and the substrate. Also, an electrically insulating layer is formed between the object layer and the contact layer. The contact layer is connected to a power supply and at least a preselected portion of the object layer is anodized to a predetermined thickness. This may include anodizing all of some preselected portions through the complete thickness of the object layer. A pattern of hardened photoresist on the object layer provides portions not protected by the pattern. When anodization of the electrically conducting object layer takes place, the resulting anodized portion is thicker than the thickness of the portion of the object layer that it replaces.
    Type: Grant
    Filed: January 28, 1982
    Date of Patent: June 26, 1984
    Assignee: Sperry Corporation
    Inventors: Barry F. Stein, Peter L. Young
  • Patent number: 4437227
    Abstract: During the manufacture of Josephson superconducting devices, it is necessary to provide on a substrate a base electrode, a counter electrode and a small tunnel barrier area therebetween. A novel method of making all three of these active elements in the same vacuum chamber without having to remove the substrate from the vacuum chamber is provided so that the tunnel barrier area is accurately made to a predetermined size and without the danger of contamination. The novel structure is made as a substantially planarized laminate in the vacuum chamber and the tunnel barrier area is defined in a supplemental step.
    Type: Grant
    Filed: October 28, 1982
    Date of Patent: March 20, 1984
    Assignee: Sperry Corporation
    Inventors: William E. Flannery, Richard M. Josephs, Barry F. Stein, Tsing-Chow Wang, Peter L. Young
  • Patent number: 4418095
    Abstract: The present invention teaches a method of planarizing built-up vacuum deposited surfaces or areas on Josephson junction and semiconductor devices so that successively deposited layers do not replicate the undulations of previous layers. After a surface layer is deposited in a vacuum system and part of the surface is etched, a raised surface is generated. A photoresist lift-off stencil is applied to the surface to be preserved and the material to be removed is removed by isotropically etching so as to leave an overhang or ledge of photoresist material over the area of the material retained. A new layer of material is now deposited by vacuum deposition so as to almost fill the area to be planarized. A small gap remains between the top of the new material being vacuum deposited and the botton of the photoresist stencil so that solvent can be introduced to the stencil. When the photoresist stencil is removed, the top of surface being preserved is substantially planar with the new layer of material.
    Type: Grant
    Filed: March 26, 1982
    Date of Patent: November 29, 1983
    Assignee: Sperry Corporation
    Inventors: Peter L. Young, Barry F. Stein, John E. Sheppard
  • Patent number: 4405658
    Abstract: During the process of vacuum deposition, metals and materials are evaporated at a point source so as to create a vapor which is dispersed isotropically. Layers of the evaporating material are deposited as built-up layers which have sharp vertical edges or steps at the areas defined by the photoresist stencil. When the line of sight of the depositing material is from an oblique angle, the layer being deposited can have a negative slope which appears as an undercut edge. The present invention employs a lift-off overhang photoresist stencil in conjunction with a relatively high pressure of inert gas in the vacuum chamber so as to promote collision of the evaporated atoms and molecules with the inert gas.
    Type: Grant
    Filed: March 26, 1982
    Date of Patent: September 20, 1983
    Assignee: Sperry Corporation
    Inventor: Peter L. Young