Patents by Inventor Peter Laackmann

Peter Laackmann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090207016
    Abstract: An apparatus including a sensor configured to sense a physical quantity, an actuator configured to manipulate the physical quantity in a predefined manner, and a detection circuit configured to output an alarm signal in case the sensor does not react to the manipulation of the physical quantity in an expected way.
    Type: Application
    Filed: February 15, 2008
    Publication date: August 20, 2009
    Applicant: Infineon Technologies AG
    Inventors: Peter Laackmann, Marcus Janke
  • Publication number: 20090206165
    Abstract: A contactless chip module including a power supply, adapted to supply the contactless chip module with power obtained from an electromagnetic field; a first receiver adapted to receive an actively modulated signal; and a second receiver adapted to receive a passively modulated signal contained in the electromagnetic field.
    Type: Application
    Filed: February 15, 2008
    Publication date: August 20, 2009
    Applicant: Infineon Technologies AG
    Inventors: Peter Laackmann, Marcus Janke
  • Publication number: 20090172489
    Abstract: A circuit arrangement comprising a logic circuit to be tested and a test circuit is provided. The logic circuit is designed to provide output data from input data, said output data being generated from the input data by logic-circuit-internal combinations, such that the output data are in a predetermined relationship with the input data. The logic circuit is designed to detect whether the relationship is fulfilled and to provide an error signal if the relationship is not fulfilled. The test circuit is designed to alter logic-circuit-internal combinations. The test circuit is designed to detect the error signal, and is furthermore designed to output an alarm signal if the error signal is not detected upon alteration of the logic-circuit-internal combinations.
    Type: Application
    Filed: November 10, 2008
    Publication date: July 2, 2009
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Markus Janke, Franz Klug, Peter Laackmann, Dirk Rabe, Stefan Rueping
  • Publication number: 20090172401
    Abstract: A system and method for controlling a device. Data that was encrypted using a first encryption scheme is decrypted, then re-encrypted using a second encryption scheme. The re-encrypted data is then decrypted.
    Type: Application
    Filed: April 4, 2008
    Publication date: July 2, 2009
    Applicant: INFINEON TECHNOLOGIES NORTH AMERICA CORP.
    Inventors: Jurijus Cizas, Shrinath Eswarahally, Peter Laackmann, Berndt Gammel, Mark Stafford, Joerg Borchert
  • Publication number: 20090172392
    Abstract: A system and method for transferring information include generating a public/private key pair for programming equipment and sending the programming equipment public key to a certificate authority. A programming equipment certificate is generated using the programming equipment public key and a private key of the certificate authority. The programming equipment certificate and a certificate authority certificate are sent to the programming equipment. Information is transferred to or from the programming equipment in response to an authentication using the programming equipment certificate and the certificate authority certificate.
    Type: Application
    Filed: April 4, 2008
    Publication date: July 2, 2009
    Applicant: INFINEON TECHNOLOGIES NORTH AMERICA CORP.
    Inventors: Jurijus Cizas, Shrinath Eswarahally, Peter Laackmann, Berndt Gammel, Mark Stafford, Joerg Borchert
  • Patent number: 7533307
    Abstract: A method for operating a volatile random access memory as a detector, with predetermined information being stored in at least one area of the volatile random access memory. The method includes interrupting a supply voltage for the at least one area of the random access memory during a time period, reading information from the at least one area of the random access memory, and checking the extent to which the predetermined information and the information that has been read match or whether the predetermined information and the information which has been read have a predetermined relationship.
    Type: Grant
    Filed: November 6, 2006
    Date of Patent: May 12, 2009
    Assignee: Infineon Technologies AG
    Inventors: Peter Laackmann, Marcus Janke
  • Publication number: 20090116650
    Abstract: Methods and systems for transferring information to a device include assigning a unique identifier to a device and generating a unique key for the device. The device is located at a first site, and the unique identifier is sent from the device to a second site. The unique key is obtained at the second site, and it is used for encrypting information at the second site. The encrypted information is sent from the second site to the device, where it can then be decrypted.
    Type: Application
    Filed: April 4, 2008
    Publication date: May 7, 2009
    Applicant: INFINEON TECHNOLOGIES NORTH AMERICA CORP.
    Inventors: Jurijus Cizas, Shrinath Eswarahally, Peter Laackmann, Berndt Gammel, Mark Stafford, Joerg Borchert
  • Patent number: 7481178
    Abstract: A radio-interrogable data storage medium having a carrier in which electric components are embedded, and a component for optically signaling a previously assumed operating state. Also, a method for operating the radio-interrogable data storage medium, including the steps of the data storage medium assuming various operating states, and optically signaling at least one previously assumed operating state.
    Type: Grant
    Filed: June 20, 2005
    Date of Patent: January 27, 2009
    Assignee: Infineon Technologies AG
    Inventor: Peter Laackmann
  • Publication number: 20080088429
    Abstract: A circuit arrangement in whose operational range a system parameter or an ambient parameter lies within a first range. The arrangement includes a node configured to receive a misadjustment signal and a sensor configured to detect the system parameter or the ambient parameter. The sensor is coupled to the node and is configured to detect whether the system parameter or the ambient parameter lies in a predetermined second range. The sensor outputs an alarm signal if the system parameter or the ambient parameter does not lie in the second range, within which the first range lies. The sensor is further configured to permanently adjust the second range in reaction to the misadjustment signal such that the second range does not encompass the first range.
    Type: Application
    Filed: October 17, 2007
    Publication date: April 17, 2008
    Applicant: Infineon Technologies AG
    Inventor: PETER LAACKMANN
  • Publication number: 20080083033
    Abstract: In a module with a controller for a chip card, the controller having first and second I/O pads for data input and output, and the module having one I/O pad. Both of the first and second I/O pads of the controller are connected to only the one I/O pad of the module. In this manner, data output via one of the first and second I/O pads of the controller may be read and monitored by the controller via the other of the first and second I/O pads of the controller.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 3, 2008
    Applicant: Infineon Technologies AG
    Inventors: Marcus Janke, Peter Laackmann
  • Publication number: 20080073437
    Abstract: An authenticity tag includes a carrier for attachment to an object, a plurality of electrically conductive areas and a controller attached to the carrier. The controller includes a detector for detecting an electrically detectable quantity at the electrically conductive area, a memory for storing a comparative quantity and a communicator for communicating at least one of the comparative quantity, the electrically detectable quantity detected and a result of a comparison of the electrically detectable quantity detected and the comparative quantity to the outside.
    Type: Application
    Filed: November 30, 2007
    Publication date: March 27, 2008
    Applicant: Infineon Technologies AG
    Inventor: PETER LAACKMANN
  • Publication number: 20080022398
    Abstract: In a system, there is communication between an electric circuit and a terminal within a scope of a terminal session, wherein the electric circuit has a current consumer for causing additional current consumption, and the terminal has a current consumption meter detecting the current consumption of the electric circuit and coupled to a checker checking authenticity of the electric circuit if the current consumption of the electric circuit has additional current consumption.
    Type: Application
    Filed: March 7, 2007
    Publication date: January 24, 2008
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: MARCUS JANKE, Peter Laackmann
  • Publication number: 20080016135
    Abstract: Apparatus and method for generating an initial value for a pseudo-random number generator, with an oscillator configured to generate an oscillator signal; and a generator configured to generate the initial value based on the oscillator signal at least during part of a transient of the oscillator.
    Type: Application
    Filed: May 31, 2007
    Publication date: January 17, 2008
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Marcus Janke, Peter Laackmann
  • Publication number: 20080010331
    Abstract: Method and device for creating a starting value for a pseudorandom number generator, having a reader configured to unstably read out an output value from a memory cell and a determiner configured to determine the starting value on the basis of the output value of the memory cell.
    Type: Application
    Filed: May 31, 2007
    Publication date: January 10, 2008
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Marcus Janke, Peter Laackmann
  • Publication number: 20080010574
    Abstract: An integrated circuit arrangement having a test line, a test signal generator which is coupled to the test line and is designed to pass a test signal onto the test line, and a comparison unit inclduing an input for applying a clock signal, the comparison unit being coupled to the test line and being designed to detect a propagation time of the test signal over the test line and to check whether the clock signal and the propagation time are in a predefined relationship.
    Type: Application
    Filed: June 14, 2007
    Publication date: January 10, 2008
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Marcus Janke, Peter Laackmann
  • Publication number: 20070297217
    Abstract: A method for operating a volatile random access memory as a detector, with predetermined information being stored in at least one area of the volatile random access memory. The method includes interrupting a supply voltage for the at least one area of the random access memory during a time period, reading information from the at least one area of the random access memory, and checking the extent to which the predetermined information and the information that has been read match or whether the predetermined information and the information which has been read have a predetermined relationship.
    Type: Application
    Filed: November 6, 2006
    Publication date: December 27, 2007
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Peter Laackmann, Marcus Janke
  • Publication number: 20070277070
    Abstract: An apparatus for checking an error detection functionality of a data processing circuit, comprising an arithmetic logic unit, which provides an output datum based on an input datum, and an error detection circuit that executes the error detection functionality and detects an error based on the output datum during correct execution of the error detection functionality, and generates an error signal, if an error is present, which comprises a control circuit that passes the error signal through to an error signal output in a normal operating mode, and blocks the error signal in a checking mode, does not let the error signal pass to the error signal output, influences the arithmetic logic unit, the error detection circuit or the input datum such that the error detection circuit detects an error during correct execution of the error detection functionality, and, if no error signal is received in response to influencing, outputs an alarm signal indicating an incorrect execution of the error detection functionality.
    Type: Application
    Filed: January 12, 2007
    Publication date: November 29, 2007
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Marcus Janke, Peter Laackmann
  • Patent number: 7290289
    Abstract: A processor comprises a first calculating unit, a second calculating unit and a control means for controlling the two calculating units, such that they selectively operate in a high security mode of operation processing complementary data or in a parallel mode of operation processing independent data, or in a security mode of operation processing the same data, or that they are in a power-saving mode of operation, wherein one of the calculating units is switched off.
    Type: Grant
    Filed: January 23, 2004
    Date of Patent: October 30, 2007
    Assignee: Infineon Technologies AG
    Inventors: Marcus Janke, Peter Laackmann
  • Publication number: 20070235547
    Abstract: A carrier arrangement having a carrier configured to fix a semiconductor chip, contacts located on the carrier and configured to make contact with the semiconductor chip, and an overvoltage protection in a form of a spark gap arrangement formed between the contacts.
    Type: Application
    Filed: April 5, 2007
    Publication date: October 11, 2007
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Marcus Janke, Peter Laackmann
  • Publication number: 20070226551
    Abstract: An apparatus for checking an error recognition functionality of a memory circuit, wherein the memory circuit includes a memory circuit that stores a datum and a check value circuit that executes the error recognition functionality and a monitoring circuit, wherein the memory circuit provides the datum to the check value circuit, wherein the check value circuit checks the datum provided thereto for errors and outputs an error signal if an error is present, wherein the monitoring circuit is coupled to the check value circuit and influences the check value circuit, the memory circuit or the datum provided to the check value circuit so that the check value circuit would discover an error in a check in a case of correct execution of the error recognition functionality, and outputs an alarm signal if the check value circuit does not output an error signal upon the influence of the monitoring circuit.
    Type: Application
    Filed: January 12, 2007
    Publication date: September 27, 2007
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Marcus Janke, Peter Laackmann