Abstract: A device for reducing evaluation time of a matrix representing an electrical circuit. Conductance values of each circuit component in the circuit are written to corresponding models utilizing non-blocking writing techniques. The matrix is represented by a reduced memory structure where each matrix node is represented by a matrix element structure having at least one pointer to a conductance value contained in a model structure corresponding to a circuit component that contributes to a value of the matrix node. A set of rows or columns of the matrix are then processed to calculate final matrix node values independently.

Abstract: A device for reducing evaluation time of a matrix representing an electrical circuit. Conductance values of each circuit component in the circuit are written to corresponding models utilizing non-blocking writing techniques. The matrix is represented by a reduced memory structure where each matrix node is represented by a matrix element structure having at least one pointer to a conductance value contained in a model structure corresponding to a circuit component that contributes to a value of the matrix node. A set of rows or columns of the matrix are then processed to calculate final matrix node values independently.

Abstract: In a computer implemented circuit simulator, a method is provided for measuring energy consumption of a circuit under test during a measurement interval. The method comprises a series of computer implemented steps. A supply voltage is applied to the circuit under test. A current flowing through the circuit under test is then measured. A mirror voltage, representative of the value of the current, is generated. A capacitor is charged, with a power parameter voltage equal to the product of the supply voltage and the mirror voltage, during the measurement interval. An accumulated voltage is measured across the capacitor, wherein the accumulated voltage is representative of energy consumed by the circuit under test.