Patents by Inventor Peter M. Frijlink

Peter M. Frijlink has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5654214
    Abstract: A method of manufacturing a semiconductor device comprising a buried channel field effect transistor, which method comprises the formation of a stack of layers on a substrate (1) with an active semiconductor layer (13, 14) having a non-zero aluminium (Al) content, a semiconductor cap layer (4) without aluminium (Al), a masking layer (100) provided with a gate opening (51); a first selective etching step by means of a fluorine (F) compound in the cap layer (4) down to the upper surface (22) of the active layer (13, 14) on which a stopper layer (3) of aluminum fluoride (AlF.sub.
    Type: Grant
    Filed: June 28, 1995
    Date of Patent: August 5, 1997
    Assignee: U.S. Philips Corporation
    Inventors: Peter M. Frijlink, Joseph Bellaiche
  • Patent number: 5643807
    Abstract: A method of manufacturing a semiconductor device with a buried channel field effect transistor, comprising the formation of a stack of layers on a substrate with an active semiconductor layer having a non-zero aluminium (Al) content, a semiconductor cap layer without aluminium (Al), a masking layer provided with a gate opening; a first selective etching step with a first etching compound containing fluorine (F) in the cap layer down to the upper surface of the active layer, whereon a stopper layer of aluminium fluoride (AlF.sub.3) is formed automatically; then elimination of the stopper layer; a second, non-selective etching step in the active layer with a second etchant until a first, central gate recess is completed; a third, selective etching process with the first etchant in the cap layer, which takes place laterally for forming the flanks of a second recess whose bottom is the upper surface.
    Type: Grant
    Filed: June 19, 1995
    Date of Patent: July 1, 1997
    Assignee: U.S. Philips Corporation
    Inventors: Peter M. Frijlink, Michel Iost
  • Patent number: 5108540
    Abstract: A method for carrying out epitaxial growth from the vapor phase of layers of semiconductor materials on semiconductor substrates, in a chamber being mainly constituted by a tube containing a susceptor for the substrate, in which tube gaseous components are circulated from one end to the other at a pressure and a temperature suitable to obtain the epitaxial growth of the monocrystalline layers on the substrate. The temperature of the wall of the chamber opposite to the susceptor, this wall being designated as the ceiling of the chamber is regulated, to produce variations of the deposition profile of the epitaxial layer formed on the substrate.Application: manufacture of discrete components of III-V semiconductor materials.
    Type: Grant
    Filed: December 6, 1988
    Date of Patent: April 28, 1992
    Assignee: U.S. Philips Corporation
    Inventor: Peter M. Frijlink
  • Patent number: 4961399
    Abstract: An epitaxial reactor for processing a plurality of semiconductor material wafers by exposing them to a reactive gaseous flow is provided with a support of the planetary type. The vessel in which the reactive gasses are in contact with the wafers (1) is constituted by a cylindrical member (19) having a vertical axis and which surrounds the planetary wafer support (3, 4, 5) as closely as possible. The cylindrical member is hermetically sealed at its lower and upper sections by a bottom formed by a plate (7) and a top formed by a plate (8), and a roughly flat cover (9) covers this arrangement. An inlet aperture for the reactive gas is located in the center of the cover, opposite the center of the planetary support. This central aperture has for its object to introduce the reactive gasses discharging into the vessel via several concentric funnels (26, 27, 28), whose flared ends face downwardly.
    Type: Grant
    Filed: March 14, 1989
    Date of Patent: October 9, 1990
    Assignee: U.S. Philips Corporation
    Inventor: Peter M. Frijlink
  • Patent number: 4860687
    Abstract: A device comprising a flat susceptor rotating parallel to a reference surface about a rotary shaft perpendicular to this surface and comprising means for obtaining the stability of the susceptor held in sustentation and means for obtaining its rotary movement, is characterized in that these means are constituted by the structure of the susceptor, of the rotary shaft and of the reference surface, which cooperate with each other under the action of one or several flow of gas.
    Type: Grant
    Filed: March 16, 1987
    Date of Patent: August 29, 1989
    Assignee: U.S. Philips Corporation
    Inventor: Peter M. Frijlink
  • Patent number: 4758868
    Abstract: The invention relates to a semiconductor device of the hetero-junction transistor type comprising a stack of semiconductor layers which in combination constitute the source, drain and gate regions, while the current path between the source and drain regions is substantially at right angles to the various junctions. The gate region constitutes an electron accumulation region in the form of a two-dimensional quasi Fermi-Dirac gas which can be brought to the desired polarization potential of at least one gate electrode, while the electrons forming the source-drain current traverse this electron cloud without having a strong interaction with it, in ballistic or quasi-ballistic conditions.
    Type: Grant
    Filed: October 21, 1987
    Date of Patent: July 19, 1988
    Assignee: U.S. Philips Corporation
    Inventor: Peter M. Frijlink
  • Patent number: 4748135
    Abstract: A method of manufacturing a semiconductor device including the step of depositing from the vapor layers on a substrate in the chamber of a reactor in which a vector gas and a reactant gas are introduced, characterized in that the vector gas and the reactant gas are introduced into the chamber of the reactor by means of a system of three coaxial tubes, the first of which (the inner tube) has a diameter smaller than that of the second tube (the intermediate tube), which in turn has a diameter smaller than that of the third tube (the outer tube), the first ends of these tube being independent, but the second ends thereof situated in the proximity of each other cooperating with each other so as to form a valve controlling the introduction of the reactant gas into the hot zone of the chamber of the reactor mixed with a vector gas, these tubes being disposed in such a manner that: the said second end of the inner tube merges into the intermediate tube, the said second end of the intermediate tube provided with a re
    Type: Grant
    Filed: May 27, 1987
    Date of Patent: May 31, 1988
    Assignee: U.S. Philips Corp.
    Inventor: Peter M. Frijlink
  • Patent number: 4722911
    Abstract: A method of manufacturing a semiconductor device is set forth including the step of depositing from a vapor phase crystalline layers on a substrate in a chamber of a reactor (R) by means of vector gases and reacting gases. The vector gases and reacting gases are introduced into the chamber of the reactor by means of one or several systems of tubes, each system composed on the one hand of a main tube (P), one end of which merges into the reactor (R) and the other end of which merges at an outlet (E), and on the other hand of three secondary tubes (6,5,7) designated as first (6), second (5) and third (7) secondary tubes with the main tube (P) comprising four restrictions (1,2,3,4) between which the three respective secondary tubes merge. The first secondary tube (6) merges closest to the reactor (R). The first (6) and third (7) secondary tubes serve to transport the vector gas(es) at a flow rate D.sub.1 and D.sub.
    Type: Grant
    Filed: May 12, 1986
    Date of Patent: February 2, 1988
    Assignee: U.S. Philips Corporation
    Inventor: Peter M. Frijlink