Patents by Inventor Peter M. Fryer

Peter M. Fryer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7037769
    Abstract: The present invention is directed to a thin film transistor (and related multilayer structures) that includes: source and drain electrodes 14 and 15 disposed at a specified interval above an insulating substrate 11 and formed by printing-and-plating; an a-Si film 16 disposed for the source and drain electrodes 14 and 15; a gate insulating film 17 laminated on the a-Si film 16; and a gate electrode 18 laminated on the gate insulating film 17 and formed by printing-and-plating. The a-Si film 16 and the gate insulating film 17 have an offset region 20 that uniformly extends beyond the dimensions of the gate electrode 18.
    Type: Grant
    Filed: July 14, 2004
    Date of Patent: May 2, 2006
    Assignee: International Business Machines Corporation
    Inventors: Peter M. Fryer, Robert L. Wisnieff, Takatoshi Tsujimura
  • Patent number: 6890599
    Abstract: New etch barriers of indium-tin-oxide in the manufacturing process of thin film transistor-liquid crystal display are self-assembled monolayers, such as n-alkylsilanes. A typical process of applying a self-assembled monolayer is to ink a hydrolyzed n-octadecyltrimethoxysilane solution on to a stamp and then to transfer the solution onto ITO. The surface of the stamp may be polar enough to be wet with polar self-assembled monolayer solutions of an akylsilane. A non-polar stamp surface may be treated with oxygen plasma to obtain a wettable polar surface.
    Type: Grant
    Filed: June 13, 2003
    Date of Patent: May 10, 2005
    Assignee: Intellectual Business Machines Corporation
    Inventors: Stephen L. Buchwalter, Gareth Geoffrey Hougham, Kang-Wook Lee, John J. Ritsko, Mary Elizabeth Rothwell, Peter M. Fryer
  • Patent number: 6866791
    Abstract: The process of derivatization and patterning of surfaces, and more particularly to the formation of self-assembled molecular monolayers on metal oxide surfaces using microcontact printing and the derivative articles produced thereby.
    Type: Grant
    Filed: May 2, 2000
    Date of Patent: March 15, 2005
    Assignee: International Business Machines Corporation
    Inventors: Tricia L. Breen, Peter M. Fryer, Robert L. Wisnieff, John Christopher Flake
  • Patent number: 6791144
    Abstract: The present invention is directed to a thin film transistor (and related multilayer structures) that includes: source and drain electrodes 14 and 15 disposed at a specified interval above an insulating substrate 11 and formed by printing-and-plating; an a-Si-film 16 disposed for the source and drain electrodes 14 and 15; a gate insulating film 17 laminated on the a-Si film 16; and a gate electrode 18 laminated on the gate insulating film 17 and formed by printing-and-plating. The a-Si film 16 and the gate insulating film 17 have an offset region 20 that uniformly extends beyond the dimensions of the gate electrode 18.
    Type: Grant
    Filed: June 27, 2000
    Date of Patent: September 14, 2004
    Assignee: International Business Machines Corporation
    Inventors: Peter M. Fryer, Robert L. Wisnieff, Takatoshi Tsujimura
  • Patent number: 6731064
    Abstract: An active matrix organic light-emitting diode comprising an organic light-emitting diode portion. The organic light-emitting diode portion comprising: an underlayer having a top surface and bottom surface; a first electrode layer which is deposited and patterned on the top surface of the underlayer such that at least a portion of the underlayer is exposed, wherein the deposited first electrode layer comprises a top surface, a bottom surface and sidewalls disposed between the top and bottom surfaces, the sidewalls are positioned adjacent to the exposed portion of the underlayer; a passivation layer deposited on the exposed portion of the underlayer and the peripheral regions of the first electrode layer such that the passivation layer covers the sidewalls and the peripheral regions of the first electrode layer; a transparent conductor layer deposited on the passivation layer and the non-peripheral regions of the first electrode layer; and a second electrode layer deposited on the transparent conductor layer.
    Type: Grant
    Filed: October 4, 2002
    Date of Patent: May 4, 2004
    Assignee: International Business Machines Corporation
    Inventors: Paul S Andry, Peter M Fryer, Frank R Libsch
  • Publication number: 20030211341
    Abstract: New etch barriers of indium-tin-oxide in the manufacturing process of thin film transistor-liquid crystal display are self-assembled monolayers, such as n-alkylsilanes. A typical process of applying a self-assembled monolayer is to ink a hydrolyzed n-octadecyltrimethoxysilane solution on to a stamp and then to transfer the solution onto ITO. The surface of the stamp may be polar enough to be wet with polar self-assembled monolayer solutions of an akylsilane. A non-polar stamp surface may be treated with oxygen plasma to obtain a wettable polar surface.
    Type: Application
    Filed: June 13, 2003
    Publication date: November 13, 2003
    Inventors: Stephen L. Buchwalter, Gareth Geoffrey Hougham, Kang-Wook Lee, John J. Ritsko, Mary Elizabeth Rothwell, Peter M. Fryer
  • Patent number: 6632536
    Abstract: New etch barriers of indium-tin-oxide in the manufacturing process of thin film transistor-liquid crystal display are self-assembled monolayers, such as n-alkylsilanes. A typical process of applying a self-assembled monolayer is to ink a hydrolyzed n-octadecyltrimethoxysilane solution on to a stamp and then to transfer the solution onto ITO. The surface of the stamp may be polar enough to be wet with polar self-assembled monolayer solutions of an akylsilane. A non-polar stamp surface may be treated with oxygen plasma to obtain a wettable polar surface.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: October 14, 2003
    Assignee: International Business Machines Corporation
    Inventors: Stephen L. Buchwalter, Gareth Geoffrey Hougham, Kang-Wook Lee, John J. Ritsko, Mary Elizabeth Rothwell, Peter M. Fryer
  • Publication number: 20030094894
    Abstract: An active matrix organic light-emitting diode comprising an organic light-emitting diode portion. The organic light-emitting diode portion comprising: an underlayer having a top surface and bottom surface; a first electrode layer which is deposited and patterned on the top surface of the underlayer such that at least a portion of the underlayer is exposed, wherein the deposited first electrode layer comprises a top surface, a bottom surface and sidewalls disposed between the top and bottom surfaces, the sidewalls are positioned adjacent to the exposed portion of the underlayer; a passivation layer deposited on the exposed portion of the underlayer and the peripheral regions of the first electrode layer such that the passivation layer covers the sidewalls and the peripheral regions of the first electrode layer; a transparent conductor layer deposited on the passivation layer and the non-peripheral regions of the first electrode layer; and a second electrode layer deposited on the transparent conductor layer.
    Type: Application
    Filed: October 4, 2002
    Publication date: May 22, 2003
    Applicant: International Business Machines Corporation
    Inventors: Paul S. Andry, Peter M. Fryer, Frank R. Libsch
  • Patent number: 6545295
    Abstract: A thin film transistor and a liquid crystal display panel are provided. These devices include a layer of ammonia-free silicon nitride formed between the gate and the gate insulator of the device.
    Type: Grant
    Filed: May 2, 2002
    Date of Patent: April 8, 2003
    Assignee: International Business Machines Corporation
    Inventors: John Batey, Peter M. Fryer, Jun Hyung Souk
  • Publication number: 20020168878
    Abstract: A thin film transistor and a liquid crystal display panel are provided. These devices include a layer of ammonia-free silicon nitride formed between the gate and the gate insulator of the device.
    Type: Application
    Filed: May 2, 2002
    Publication date: November 14, 2002
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John Batey, Peter M. Fryer, Jun Hyung Souk
  • Patent number: 6420282
    Abstract: A method for passivating copper, aluminum, or other refractory metal films using ammonia-free silicon nitride and structures produced by the method. A thin film transistor for use in a liquid crystal display and a method of constructing the same, wherein the transistor has a gate, a source and a drain, and a gate insulator between the gate and an active silicon layer. The improvement is a layer of the ammonia-free silicon nitride deposited between the copper,aluminum, or other refractory metal gate and the gate insulator. Further,. the gate is copper, aluminum, or another refractory metal and is deposited directly on the substrate. The layer of ammonia-free silicon nitride is also deposited on portions of the substrate adjacent the gate and the gate line extending therefrom. The layer is made in a plasma-enhanced chemical vapor deposition process wherein the gas mixture comprises one part silane to 135 parts nitrogen to 100 parts helium and 100 parts hydrogen.
    Type: Grant
    Filed: September 8, 2000
    Date of Patent: July 16, 2002
    Assignee: International Business Machines Corporation
    Inventors: John Batey, Peter M. Fryer, Jun Hyung Souk
  • Publication number: 20020084252
    Abstract: New etch barriers of indium-tin-oxide in the manufacturing process of thin film transistor-liquid crystal display are self-assembled monolayers, such as n-alkylsilanes. A typical process of applying a self-assembled monolayer is to ink a hydrolyzed n-octadecyltrimethoxysilane solution on to a stamp and then to transfer the solution onto ITO. The surface of the stamp may be polar enough to be wet with polar self-assembled monolayer solutions of an akylsilane. A non-polar stamp surface may be treated with oxygen plasma to obtain a wettable polar surface.
    Type: Application
    Filed: December 28, 2000
    Publication date: July 4, 2002
    Inventors: Stephen L. Buchwalter, Gareth Geoffrey Hougham, Kang-Wook Lee, John J. Ritsko, Mary Elizabeth Rothwell, Peter M. Fryer
  • Patent number: 6380101
    Abstract: Microcontact printing to pattern a self-assembled monolayer (SAM) of an alkanephosphonic acid on a film of indium zinc oxide (IZO). The SAM is robust enough to protect the undelying IZO from wet chemical etching, and thus defines a pattern of IZO on the substrate. In the microcontact printing process, a patterned, elastomeric stamp is inked with a solution of octadecylphosphonic acid and brought into conformal contact with the IZO surface. A SAM of alkanesulfonic acid forms where the stamp and the surface make contact; the rest remains underivatized. The stamp is then removed from the surface. Etching the sample in aqueous oxalic acid removes the unprotected areas, while the areas protected by the SAM remain in place.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: April 30, 2002
    Assignee: International Business Machines Corporation
    Inventors: Tricia L. Breen, Peter M. Fryer, Ronald Wayne Nunes, Mary Elizabeth Rothwell
  • Patent number: 6165917
    Abstract: A method for passivating copper, aluminum, or other refractory metal films using ammonia-free silicon nitride and structures produced by the method. A thin film transistor for use in a liquid crystal display and a method of constructing the same, wherein the transistor has a gate, a source and a drain, and a gate insulator between the gate and an active silicon layer. The improvement is a layer of the ammonia-free silicon nitride deposited between the copper, aluminum, or other refractory metal gate and the gate insulator. Further, the gate is copper, aluminum, or another refractory metal and is deposited directly on the substrate. The layer of ammonia-free silicon nitride is also deposited on portions of the substrate adjacent the gate and the gate line extending therefrom. The layer is made in a plasma-enhanced chemical vapor deposition process wherein the gas mixture comprises one part silane to 135 parts nitrogen to 100 parts helium and 100 parts hydrogen.
    Type: Grant
    Filed: June 18, 1997
    Date of Patent: December 26, 2000
    Assignee: International Business Machines Corporation
    Inventors: John Batey, Peter M. Fryer, Jun Hyung Souk
  • Patent number: 5912506
    Abstract: A multi-layer metal sandwich structure with taper and reduced etch bias formed on a substrate includes a first metal layer formed on the substrate and a second metal layer formed on the first metal layer. The width of the first metal layer is greater than the width of the second metal layer at the interface of the first metal layer and the second metal layer. The second metal layer has tapered side walls. The taper angle between each side wall and the intersection of the first and second metal layers is between 5.degree. and 90.degree.. The multi-layer metal sandwich may also include a third metal layer formed on the second metal layer.
    Type: Grant
    Filed: September 20, 1997
    Date of Patent: June 15, 1999
    Assignee: International Business Machines Corporation
    Inventors: Evan G. Colgan, Peter M. Fryer, James McKell Edwin Harper, Kenneth P. Rodbell
  • Patent number: 5831283
    Abstract: A layer for passivating copper, aluminum, or other refractory metal films using ammonia-free silicon nitride and structures produced by the method. A thin film transistor for use in a liquid crystal display, wherein the transistor has a gate, a source and a drain, and a gate insulator between the gate and an active silicon layer. The improvement is a layer of the ammonia-free silicon nitride deposited between the copper, aluminum, or other refractory metal gate and the gate insulator. Further, the gate is copper, aluminum, or another refractory metal and is deposited directly on the substrate. The layer of ammonia-free silicon nitride is also deposited on portions of the substrate adjacent the gate and the gate line extending therefrom. The structure provides stable and low-resistance electrical contact between copper, aluminum, or another refractory metal gate lines and a metallization layer of aluminum and/or molybdenum, includes using a conductive material, such as an indium tin oxide bridge.
    Type: Grant
    Filed: April 22, 1996
    Date of Patent: November 3, 1998
    Assignee: International Business Machines Corporation
    Inventors: John Batey, Peter M. Fryer, Jun Hyung Souk
  • Patent number: 5281485
    Abstract: The present invention relates generally to a structure and a method of making Alpha-Ta films, and more particularly, to a structure and a method of making Alpha-Ta in thin films. A seed layer of Ta reactively sputtered in a nitrogen containing environment is grown on the substrate, and using this seed layer of Ta(N) layers of Alpha-Ta are then formed.
    Type: Grant
    Filed: January 15, 1993
    Date of Patent: January 25, 1994
    Assignee: International Business Machines Corporation
    Inventors: Evan G. Colgan, Peter M. Fryer
  • Patent number: 5221449
    Abstract: The present invention relates generally to a structure and a method of making Alpha-Ta films, and more particularly, to a structure and a method of making Alpha-Ta in thin films. A seed layer of Ta reactively sputtered in a nitrogen containing environment is grown on the substrate, and using this seed layer of Ta(N) layers of Alpha-Ta are then formed.
    Type: Grant
    Filed: July 9, 1992
    Date of Patent: June 22, 1993
    Assignee: International Business Machines Corporation
    Inventors: Evan G. Colgan, Peter M. Fryer