Abstract: One embodiment relates to an apparatus that includes at least one circuit block and a voltage source configured to supply a first voltage to the at least one circuit block. The apparatus also includes a power delivery unit configured to be selectively activated based on a whether a quantity of power is to be delivered from the power delivery unit to the circuit block. A control unit is configured to, upon a change in power consumption of the at least one circuit block, activate the auxiliary power delivery unit to deliver the quantity of power to the circuit block. The auxiliary power delivery unit can quickly supply large currents since it does not necessarily rely on slow control loops using voltage sensing. Rather, the auxiliary power delivery unit often delivers pre-calculated current profiles to respond to the timing characteristic of the change of power consumption and of the voltage regulator.

Abstract: A method for controlling a supply current for a circuit includes setting a target value of a quantity related to a supply current, said target value being different from a presently established value of the quantity, and adjusting the quantity until a value of the quantity corresponds to the target value. A method for controlling a supply current to a plurality of circuit blocks includes providing a plurality of partial supply currents to the plurality of circuit blocks, setting at least one target value of a quantity related to at least one of the partial supply currents, checking whether a predetermined condition which depends on the at least one set target value is achieved, and if the predetermined condition is not achieved, changing at least one among the at least one target values and the at least one partial supply currents to achieve the predetermined condition.

Abstract: According to one aspect of this disclosure, a circuit arrangement is provided, the circuit arrangement including an electronic component coupled to at least one common power supply node and configured to provide a first signal having a variation in time that is based on power supply via the at least one common power supply node; a detecting circuit coupled to the electronic component, the detecting circuit being configured to detect the first signal and to provide a digital switch array control signal based on the variation in time of the first signal; and a switch array coupled between the at least one common power supply node and at least one power supply source, the switch array being configured to control the power supply via the at least one common power supply node based on the digital switch array control signal.

Abstract: According to one aspect of this disclosure, a circuit arrangement is provided, the circuit arrangement including an electronic component coupled to at least one common power supply node and configured to provide a first signal having a variation in time that is based on power supply via the at least one common power supply node; a detecting circuit coupled to the electronic component, the detecting circuit being configured to detect the first signal and to provide a digital switch array control signal based on the variation in time of the first signal; and a switch array coupled between the at least one common power supply node and at least one power supply source, the switch array being configured to control the power supply via the at least one common power supply node based on the digital switch array control signal.

Abstract: One embodiment relates to an apparatus that includes at least one circuit block and a voltage source configured to supply a first voltage to the at least one circuit block. The apparatus also includes a power delivery unit configured to be selectively activated based on a whether a quantity of power is to be delivered from the power delivery unit to the circuit block. A control unit is configured to, upon a change in power consumption of the at least one circuit block, activate the auxiliary power delivery unit to deliver the quantity of power to the circuit block. The auxiliary power delivery unit can quickly supply large currents since it does not necessarily rely on slow control loops using voltage sensing. Rather, the auxiliary power delivery unit often delivers pre-calculated current profiles to respond to the timing characteristic of the change of power consumption and of the voltage regulator.

Abstract: Method for ascertaining an operating range for an integrated circuit which has a plurality of system components, in which a test routine is performed for testing at least one system component from the plurality of system components, where the at least one system component is not in operation and at least one other untested system component from the plurality of system components is ready for operation when the at least one system component is tested.

Abstract: A method for controlling a supply current for a circuit includes setting a target value of a quantity related to a supply current, said target value being different from a presently established value of the quantity, and adjusting the quantity until a value of the quantity corresponds to the target value. A method for controlling a supply current to a plurality of circuit blocks includes providing a plurality of partial supply currents to the plurality of circuit blocks, setting at least one target value of a quantity related to at least one of the partial supply currents, checking whether a predetermined condition which depends on the at least one set target value is achieved, and if the predetermined condition is not achieved, changing at least one among the at least one target values and the at least one partial supply currents to achieve the predetermined condition.

Abstract: A method for controlling a supply current for a circuit comprises setting a target value of a quantity related to a supply current, said target value being different from a presently established value of the quantity, and adjusting the quantity until a value of the quantity corresponds to the target value. A method for controlling a supply current to a plurality of circuit blocks comprises providing a plurality of partial supply currents to the plurality of circuit blocks, setting at least one target value of a quantity related to at least one of the partial supply currents, checking whether a predetermined condition which depends on the at least one set target value is achieved, and if the predetermined condition is not achieved, changing at least one among the at least one target values and the at least one partial supply currents to achieve the predetermined condition.

Abstract: In a method for recording critical parameters for circuit sections of electronic appliances, the critical parameters are represented by status bits in a status register (24). As a result of a change of state for a critical parameter, the associated status bit assumes a new value and retains this value up until a read operation.

Abstract: An apparatus for data transmission between memories has a memory controller as well as a memory protocol controller. In one embodiment, a first memory controller is operatively connected to a first memory, and a memory protocol controller is operatively connected between the first memory controller and a second memory, wherein the first memory is a volatile memory and the second memory is a nonvolatile memory. The volatile memory includes a command list containing a command sequence for the memory protocol controller. The memory protocol controller may be configured to produce at least one of an error detection code and an error correction code when an error condition occurs.

Abstract: A method for controlling a supply current for a circuit comprises setting a target value of a quantity related to a supply current, said target value being different from a presently established value of the quantity, and adjusting the quantity until a value of the quantity corresponds to the target value. A method for controlling a supply current to a plurality of circuit blocks comprises providing a plurality of partial supply currents to the plurality of circuit blocks, setting at least one target value of a quantity related to at least one of the partial supply currents, checking whether a predetermined condition which depends on the at least one set target value is achieved, and if the predetermined condition is not achieved, changing at least one among the at least one target values and the at least one partial supply currents to achieve the predetermined condition.

Abstract: Method for ascertaining an operating range for an integrated circuit which has a plurality of system components, in which a test routine is performed for testing at least one system component from the plurality of system components, where the at least one system component is not in operation and at least one other untested system component from the plurality of system components is ready for operation when the at least one system component is tested.

Abstract: Clock regulation apparatus for preventing a logic switching mechanism from operating incorrectly. The apparatus has a supply voltage input that receives a supply voltage, which is also applied to the logic switching mechanism, a comparison unit that outputs an error signal if the supply voltage value drops below a reference value, a clock signal input that receives a clock signal from a clock generator, and a clock suppression unit, which is coupled to the clock signal input and to the comparison unit, that has a clock output for outputting the clock signal and that suppresses or delays the clock signal for a duration of at least one clock period if the error signal exists.

Abstract: An apparatus for data transmission between memories has a memory controller as well as a memory protocol controller. In one embodiment, a first memory controller is operatively connected to a first memory, and a memory protocol controller is operatively connected between the first memory controller and a second memory, wherein the first memory is a volatile memory and the second memory is a nonvolatile memory. The volatile memory includes a command list containing a command sequence for the memory protocol controller. The memory protocol controller may be configured to produce at least one of an error detection code and an error correction code when an error condition occurs.

Abstract: The invention relates to a processor/memory system having at least one processor, a memory unit, and at least one memory control unit for controlling accesses from the at least one processor to the memory unit. The system also includes a hardware configuration unit operable to configure the at least one memory control unit when the at least one memory control unit changes from a low-power operating mode to a normal-power operating mode.

Abstract: In a method for recording critical parameters for circuit sections of electronic appliances, the critical parameters are represented by status bits in a status register (24). As a result of a change of state for a critical parameter, the associated status bit assumes a new value and retains this value up until a read operation.

Abstract: Clock regulation apparatus for preventing a logic switching mechanism from operating incorrectly. The apparatus has a supply voltage input that receives a supply voltage, which is also applied to the logic switching mechanism, a comparison unit that outputs an error signal if the supply voltage value drops below a reference value, a clock signal input that receives a clock signal from a clock generator, and a clock suppression unit, which is coupled to the clock signal input and to the comparison unit, that has a clock output for outputting the clock signal and that suppresses or delays the clock signal for a duration of at least one clock period if the error signal exists.

Abstract: A method allows the use of inexpensive read-only memory together with rewriteable memory. To this end, a memory management logic unit interacts with a control unit, with a read-only memory and with a rewriteable memory. The data, in particular memory areas of the read-only memory, have been replaced with data in the rewriteable memory. If the control unit accesses the replaced data in the read-only memory, the memory management logic unit diverts this access to the corresponding data in the rewriteable memory.

Abstract: A method allows the use of inexpensive read-only memory together with rewriteable memory. To this end, a memory management logic unit interacts with a control unit, with a read-only memory and with a rewriteable memory. The data, in particular memory areas of the read-only memory, have been replaced with data in the rewriteable memory. If the control unit accesses the replaced data in the read-only memory, the memory management logic unit diverts this access to the corresponding data in the rewriteable memory.

Abstract: A circuit configuration for low-power reference voltage generation, is described. The circuit has a programmable voltage source which generates an output voltage which is compared with a reference voltage at predetermined times. Depending on the comparison, at least one signal, which is supplied to a control device, is derived by a calibration device. The control device programs the voltage source in such a manner that the output voltage corresponds to the reference voltage as closely as possible.