Patents by Inventor Peter Michael Kavanagh

Peter Michael Kavanagh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Hybrid PLL/FLL circuit to provide a clock
    Patent number: 8779812
    Abstract: Clock circuits are presented for providing a clock signal using multiple reference clock signals, including a PLL operating from a PLL reference clock signal, an FLL operating from an FLL reference clock signal, and a multiplexer circuit that selectively provides up and down signals from either a PFD of the PLL or the FLL to a charge pump of the PLL according to a reference clock select signal.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: July 15, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Peter Michael Kavanagh, Andrew Khar Boon Ong