Abstract: A method for curing antenna violations on an integrated circuit that includes multiple levels includes: obtaining a design of a circuit, the design including a first element connected to first device and a second element connected to one or more second devices, wherein the first and second elements both receive a common signal; determining that an antenna violation exists in on the first element at a first level of the multiple levels; and modifying the design of the circuit to add a connected between the first element and the second element at the first layer or at a layer below the first layer.

Abstract: Embodiments of the invention include protecting against antenna violations in a macro having a clock mesh. Aspects include obtaining a design of the macro, the design including a clock layer having a plurality of clock pins and determining a longest vertical wire and a longest horizontal wire allowed based on a design of the clock mesh. Aspects also include identifying, based at least in part on the longest vertical wire and the longest horizontal wire, a plurality of checkbox regions for a clock pin of the plurality of clock pins and calculating a total diffusion area for each of the plurality of checkbox regions. Aspects further include adding, to the design of the macro, an antenna diode to the clock pin based on a determination that the total diffusion area for any of the plurality of checkbox regions is less than a threshold value.