Patents by Inventor Peter Moschak

Peter Moschak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120228014
    Abstract: A circuitized substrate for use in such electrical structures as information handling systems wherein the substrate includes a capacitive substrate as part thereof. The capacitive substrate includes a thin film layer of capacitive material strategically positioned on a conductive layer relative to added electrically conductive elements to in turn provide a plurality of internal capacitors within the final circuitized substrate during operation thereof. A method of making such a circuitized substrate is also provided.
    Type: Application
    Filed: March 8, 2011
    Publication date: September 13, 2012
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, Mark D. Poliks, Voya R. Markovich, Peter A. Moschak
  • Publication number: 20110173809
    Abstract: Apparatus and method for making circuitized substrates using a continuous roll format in which a layer of conductor is fed into the apparatus, layers of photo-imageable dielectric are applied to opposite sides of the conductor layer, thru-holes are formed through the composite, and then metal layers are added over the dielectric and then patterns (e.g., circuit) are formed therein. Several operations are performed in addition to these to form the final end product, a circuitized substrate (e.g., printed circuit board), all while the conductor layer of the product is retained in a solid format, up to the final separation from the continuous layer.
    Type: Application
    Filed: January 20, 2010
    Publication date: July 21, 2011
    Inventors: John M. Lauffer, Voya R. Markovich, James J. McNamara, JR., Peter A. Moschak
  • Patent number: 7977034
    Abstract: Apparatus and method for making circuitized substrates using a continuous roll format in which a layer of conductor is fed into the apparatus, layers of photo-imageable dielectric are applied to opposite sides of the conductor layer, thru-holes are formed through the composite, and then metal layers are added over the dielectric and then patterns (e.g., circuit) are formed therein. Several operations are performed in addition to these to form the final end product, a circuitized substrate (e.g., printed circuit board), all while the conductor layer of the product is retained in a solid format, up to the final separation from the continuous layer.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: July 12, 2011
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: John M. Lauffer, Voya R. Markovich, James J. McNamara, Jr., Peter A. Moschak
  • Patent number: 7827682
    Abstract: Apparatus and method for making circuitized substrates using a continuous roll format in which a layer of conductor is fed into the apparatus, layers of photo-imageable dielectric are applied to opposite sides of the conductor layer, thru-holes are formed through the composite, and then metal layers are added over the dielectric and then patterns (e.g., circuit) are formed therein. Several operations are performed in addition to these to form the final end product, a circuitized substrate (e.g., printed circuit board), all while the conductor layer of the product is retained in a solid format, up to the final separation from the continuous layer.
    Type: Grant
    Filed: April 21, 2005
    Date of Patent: November 9, 2010
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: John M. Lauffer, Voya R. Markovich, James J. McNamara, Jr., Peter A. Moschak
  • Publication number: 20060240364
    Abstract: Apparatus and method for making circuitized substrates using a continuous roll format in which a layer of conductor is fed into the apparatus, layers of photo-imageable dielectric are applied to opposite sides of the conductor layer, thru-holes are formed through the composite, and then metal layers are added over the dielectric and then patterns (e.g., circuit) are formed therein. Several operations are performed in addition to these to form the final end product, a circuitized substrate (e.g., printed circuit board), all while the conductor layer of the product is retained in a solid format, up to the final separation from the continuous layer.
    Type: Application
    Filed: April 21, 2005
    Publication date: October 26, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: John Lauffer, Voya Markovich, James McNamara, Peter Moschak
  • Patent number: 6830875
    Abstract: A method for forming an electronic structure. Provides is a layer that includes a cylindrical volume of a photoimageable dielectric (PID) material, an annular volume of the PID material circumscribing the cylindrical volume, and a remaining volume of the PID material circumscribing the annular volume. The layer is photolithograhically exposed to radiation. The annular volume is fully cured by the radiation. The remaining volume is partially cured by the remaining volume by said radiation. The method prevents curing of the cylindrical volume, wherein the PID material in the cylindrical volume remains uncured.
    Type: Grant
    Filed: October 7, 2002
    Date of Patent: December 14, 2004
    Assignee: International Business Machines Corporation
    Inventors: Stephen J. Fuerniss, Gary Johansson, Ross W. Keesler, John M. Lauffer, Voya R. Markovich, Peter A. Moschak, David J. Russell, William E. Wilson
  • Patent number: 6830627
    Abstract: The present invention is a persulfate microetchant composition especially useful for removing impurities from copper surfaces during fabrication of microelectronic packages. The microetchant formulation is characterized by its ability to selectively clean copper in the presence of nickel, nickel-phosphorous and noble metal alloys therefrom. Furthermore, no deleterious galvanic etching occurs in this microetchant-substrate system so that substantially no undercutting of the copper occurs. The combination of high selectivity and no undercutting allows for a simplification of the microelectronic fabrication process and significant improvements in the design features of the microelectronic package, in particular higher density circuits. The persulfate microetchant composition is stabilized with acid and phosphate salts to provide a process that is stable, fast acting, environmentally acceptable, has high capacity, and can be performed at room temperature.
    Type: Grant
    Filed: March 23, 1999
    Date of Patent: December 14, 2004
    Assignee: International Business Machines Corporation
    Inventors: Kathleen L. Covert, John M. Lauffer, Peter A. Moschak
  • Publication number: 20030047357
    Abstract: A through hole, and associated method of formation, through a layered structure that includes one or more layers having photoimageable dielectric (PID) material. The method forms a via within each such layer in isolation and then stacks the layers in a way that registers the vias over one another such that the through hole is formed as the sequentially registered vias. A sticker layer of the layered structure includes a cylindrical volume, an annular volume circumscribing the cylindrical volume, and a remaining volume surrounding the annular volume. The sticker layer preferentially includes a power plane of continuous metalization having a hole, wherein a perimeter of the hole surrounds the fully cured volume and circumscribes a portion of the remaining volume.
    Type: Application
    Filed: October 7, 2002
    Publication date: March 13, 2003
    Inventors: Stephen J. Fuerniss, Joan Cangelosi, Gary Johansson, Ross W. Keesler, John M. Lauffer, Voya R. Markovich, Peter A. Moschak, David J. Russell, William E. Wilson
  • Patent number: 6521328
    Abstract: The present invention is a persulfate etchant composition especially useful for dissolving copper during fabrication of microelectronic packages. The etchant is characterized by its ability to selectively etch copper in the presence of nickel, nickel-phosphorous and noble metal alloys therefrom. Furthermore, no deleterious galvanic etching occurs in this etchant-substrate system so that substantially no undercutting of the copper occurs. The combination of high selectivity and no undercutting allows for a simplification of the microelectronic fabrication process and significant improvements in the design features of the microelectronic package, in particular higher density circuits. The persulfate etchant composition is stabilized with acid and phosphate salts to provide a process that is stable, fast acting, environmentally acceptable, has high capacity, and can be performed at room temperature. A preferred etchant composition is 230 gm/liter sodium persulfate, 3 volume % phosphoric acid and 0.
    Type: Grant
    Filed: September 5, 2000
    Date of Patent: February 18, 2003
    Assignee: International Business Machines Corporation
    Inventors: John M. Lauffer, Kathleen L. Covert, Peter A. Moschak
  • Patent number: 6521844
    Abstract: An electronic structure. The electronic structure comprises a layer. The layer includes: a cylindrical volume; a fully cured annular volume of a photoimageable dielectric (PID) material circumscribing the cylindrical volume; and a partially cured remaining volume of the PID material circumscribing the annular volume. The cylindrical volume may include a via. The structure can include a power plane.
    Type: Grant
    Filed: October 29, 1999
    Date of Patent: February 18, 2003
    Assignee: International Business Machines Corporation
    Inventors: Stephen J. Fuerniss, Gary Johansson, Ross W. Keesler, John M. Lauffer, Voya R. Markovich, Peter A. Moschak, David J. Russell, William E. Wilson
  • Patent number: 6291776
    Abstract: A chip carrier constituted of an organic laminate which incorporates structure compensating for thermal deformation of the carrier. Moreover, disclosed is a method of counteracting the thermal deformations encountered by chip carriers, especially during solder reflow, which is predicated on the uniformly, equidistant positioning of metal-plated through-holes (PTH) formed in the chip carrier relative to contact pads. A plurality of plated through-holes (PTH) are positioned equidistantly relative to contact (BGA) pads on a surface of a substrate which is constituted of an organic laminate material, so as to be able to control both in-plane and out-of-plane thermal deformations in the chip carrier material which may be occasioned in a solder reflow furnace or oven.
    Type: Grant
    Filed: November 3, 1998
    Date of Patent: September 18, 2001
    Assignee: International Business Machines Corporation
    Inventors: Voya R. Markovich, Peter A. Moschak, Seungbae Park, Sanjeev B. Sathe
  • Patent number: 6156221
    Abstract: The present invention is a persulfate etchant composition especially useful for dissolving copper during fabrication of microelectronic packages. The etchant is characterized by its ability to selectively etch copper in the presence of nickel, nickel-phosphorous and noble metal alloys therefrom. Furthermore, no deleterious galvanic etching occurs in this etchant-substrate system so that substantially no undercutting of the copper occurs. The combination of high selectivity and no undercutting allows for a simplification of the microelectronic fabrication process and significant improvements in the design features of the microelectronic package, in particular higher density circuits. The persulfate etchant composition is stabilized with acid and phosphate salts to provide a process that is stable, fast acting, environmentally acceptable, has high capacity, and can be performed at room temperature. A preferred etchant composition is 230 gm/liter sodium persulfate, 3 volume % phosphoric acid and 0.
    Type: Grant
    Filed: October 2, 1998
    Date of Patent: December 5, 2000
    Assignee: International Business Machines Corporation
    Inventors: John M. Lauffer, Kathleen L. Covert, deceased, Peter A. Moschak
  • Patent number: 4786528
    Abstract: Reinforced synthetic polymer composite is treated by heating at a temperature and for a time sufficient to obtain a moisture content below that for the relative humidity level at which the composite is to be drilled and/or photoresist exposed; and then subjecting it to conditions to increase the moisture content to that for the relative humidity level of the drilling.
    Type: Grant
    Filed: May 20, 1986
    Date of Patent: November 22, 1988
    Assignee: International Business Machines Corporation
    Inventors: William J. Amelio, Voya Markovich, William J. McCarthy, Allen F. Moring, Peter A. Moschak, Douglas H. Strope