Abstract: Provided is a low noise amplifier circuit for a quantum computer. The low noise amplifier circuit comprises a plurality of input stages, a shared output stage, and a voltage controller. Each input stage is coupled to one or more qubits. The shared output stage is coupled to the plurality of input stages. The voltage controller is coupled to the plurality of input stages and the shared output stage. The voltage controller is configured to selectively activate an input stage of the plurality of input stages in order to read a qubit coupled to the input stage.

Abstract: A superconductor transistor structure includes a source electrode and a drain electrode on a same plane as the source electrode. There is a channel region on top of the source and drain electrodes and configured to carry a current. A gate structure comprising a metallic material is on top of the channel region. The source and drain are located on a side that is opposite to that of the gate structure, with respect to the channel region.

Abstract: An electrical machine, in particular an electronically commutated machine, includes a housing and a controller accommodated in the housing. The controller is configured to drive the machine to generate a magnetic rotating field. The housing has a housing cup, which surrounds a hollow space, and a housing cover. The machine has an end plate accommodated in the housing cup. The end plate is thermally conductively connected to the housing cup. The machine also has a cooling panel thermally conductively connected to the housing cup and to at least one component, or to a plurality of components, of the control unit. The machine has an inverter comprising semiconductor switches. The semiconductor switches are thermally conductively connected to the end plate. The end plate and the cooling panel enclose a portion of the hollow space.

Abstract: The present disclosure relates to a cryogenic integrated circuit, the circuit being a Complementary metal-oxide-semiconductor (CMOS) or Bipolar CMOS (BiCMOS) stacked circuit. The circuit comprises: a substrate, and a resonator formed on the substrate. The resonator comprises a meandered inductor formed in a specific metal layer of the stack, wherein the specific metal layer, when cooled below a critical temperature, becomes superconducting.

Abstract: Embodiments including a semiconductor device circuit for biasing gates of a qubit device as well as a method for operating the device are disclosed. The embodiments may include a multiplexed array of capacitor cells, where each capacitor cell includes a transistor-controlled capacitor, where each capacitor is connected between a drain of a respective transistor and ground, where each source of all transistors of all capacitor cells are connected to a common control point, and where each gate of the transistors of the capacitor cells are individually voltage controllable. The embodiment may include a charging unit connected to the common control point, and a discharging unit connected to the common control point, where the charging unit and the discharging unit are alternatively activatable.

Abstract: A locking unit for a vehicle seat may have a housing and a locking device, arranged at least partially in the housing, for detachably locking a mating element. The locking device may have a baseplate, a first bearing bolt, a second bearing bolt, a rotary latch with a receptacle for securing the mating element and at least one securing element for securing a closed position of the rotary latch. The at least one securing element is pivotably mounted on the second bearing bolt. The housing may have a first housing part with a bottom, and a second housing part with a bottom. The bottom of the first housing part has at least one projection, which is formed in the direction of the rotary latch and/or the at least one securing element. An adapter arrangement for attachment of the locking unit to a vehicle seat is also provided.

Abstract: A computer-implemented method of reducing an impact of stray magnetic fields on components of a quantum computing chip is disclosed. The computer implemented method includes applying a first current signal to a first component of a quantum computing chip, whereby the first component generates a stray magnetic field impacting an operation of a second component of the quantum computing chip. The computer implemented method further includes applying a compensation current signal to a shielding circuit of the quantum computing chip, the compensation current signal generated according to a predetermined function of the first signal, to magnetically shield the second component from the stray magnetic field generated by the first component.

Abstract: A method for forming a semiconductor structure comprising isolated coupled quantum dots defining a physical spin qubit is disclosed. The method comprises structuring the doped silicon layer using an SIO substrate with a source area structure, a linear structure extending from the source area, gate structures extending vertically to a main extension direction of the linear structure, covering the structures with an oxide, removing the oxide at a lateral end of the linear structure, laterally etching back the linear structure between the blanket oxide and the SOI isolator, epitaxial filling the hollow template with a first semiconductor material different from the silicon, continuing the epitaxial and laterally filling the hollow template with an alternating sequence of lateral thin layers of a second and a third semiconductor material, and continuing the epitaxial filling the hollow template with the first semiconductor material until an end of the hollow template is reached.

Abstract: A method for forming a semiconductor structure comprising quantum dots with self-aligned gate structures is disclosed. The method comprises structuring a doped silicon-on-isolator to build a source area, a linear structure extending from the source area having at least two distinct broadened areas, a first and a second gate structure simultaneously by a single lithography process; covering the structures with a blanket oxide layer, forming an opening in the blanket oxide layer at a lateral end of the linear structure, etching back the linear structure and the at least two distinct broadened areas below the blanket oxide until the source area is reached, and filling the hollow template with a semiconductor material different to the silicon such that the at least two broadened areas build quantum dot areas.

Abstract: Several methods are described for generating mycelial scaffolds for use several technologies. In one embodiment, a mycelial scaffold is generated using a perfusion bioreactor system for cell-based meat technologies. In another embodiment, a mycelial scaffold is prepared for biomedical applications. The mycelial scaffolds may be generated from a liquid medium or from a solid substrate.

Abstract: A contactor module is adapted to detect a switching state of a contactor. The contactor module includes a movable element that is arranged to transmit the movement of a switching element of the contactor to the contactor module; and a deflection lever attached to the movable element. The deflection lever is arranged to indicate the switching state.

Abstract: A sensor includes a core oriented along a first vector corresponding to an axis of the core. A slanted coil has windings around the core at an angle to the axis of the core along a second vector oriented at a substantial angle to the direction of the windings. At least one middle conductor is coupled to the windings to enable dividing the windings into sub-coils about the middle conductors. The sub-coils may have different slants with respect to the direction of the windings. A pair of end conductors are coupled to opposite ends of the coils such that signals obtained from the middle and end conductors provide sufficient information to determine roll about the axis of the core.

Abstract: The invention relates to a control unit for controlling a data transfer between a classical processor and a quantum processor with a plurality of qubits. The control unit comprises a plurality of control and read-out circuits configured for controlling and reading out the plurality of qubits. Each of the control and read-out circuits is assigned to one or more of the qubits. A controlling of the quantum processor by the control unit comprises selectively powering on a subset of the control and read-out circuits during an instruction cycle, while ensuring that the remaining control and read-out circuits are powered off during the instruction cycle. The powered-on subset of control and read-out circuits is used to control a subset of the qubits and to read out data from the subset of qubits.

Abstract: Described herein are crystalline forms of 4-[(3S)-3-aminopyrrolidin-1-yl]-6-cyano-5-(3,5-difluorophenyl)-N-[(2S)-1,1,1-trifluoropropan-2-yl]pyridine-3-carboxamide, uses of such crystalline forms in the preparation of pharmaceutical compositions for the treatment of diseases or conditions that would benefit by administration with a somatostatin modulator compound.

Abstract: Provided is a low noise amplifier circuit for a quantum computer. The low noise amplifier circuit comprises a plurality of input stages, a shared output stage, and a voltage controller. Each input stage is coupled to one or more qubits. The shared output stage is coupled to the plurality of input stages. The voltage controller is coupled to the plurality of input stages and the shared output stage. The voltage controller is configured to selectively activate an input stage of the plurality of input stages in order to read a qubit coupled to the input stage.

Abstract: An electrostatic discharge (ESD) protection circuit is configured to protect a target circuit that operates in a cryogenic temperature is provided. The ESD protection circuit connects a terminal of the target circuit and a ground potential with no connection to a bias potential. When the ESD protection circuit receives a voltage potential at the terminal of the target circuit, the ESD protection circuit (i) disallows electrical current to flow through from the received voltage potential when the device is at a cryogenic temperature and (ii) allows electrical current to flow through from the received voltage potential when the device is at a room temperature.

Abstract: An electrostatic discharge (ESD) protection circuit is configured to protect a target circuit that operates in a cryogenic temperature is provided. The ESD protection circuit connects a terminal of the target circuit and a ground potential with no connection to a bias potential. When the ESD protection circuit receives a voltage potential at the terminal of the target circuit, the ESD protection circuit (i) disallows electrical current to flow through from the received voltage potential when the device is at a cryogenic temperature and (ii) allows electrical current to flow through from the received voltage potential when the device is at a room temperature.

Abstract: One or more systems, devices, methods of use and/or methods of fabrication provided herein relate to a high-electron-mobility transistor with a gate electrode below the channel.

Abstract: A superconductor transistor structure includes a source electrode and a drain electrode on a same plane as the source electrode. There is a channel region on top of the source and drain electrodes and configured to carry a current. A gate structure comprising a metallic material is on top of the channel region. The source and drain are located on a side that is opposite to that of the gate structure, with respect to the channel region.

Abstract: The invention relates to a control unit for controlling a data transfer between a classical processor and a quantum processor with a plurality of qubits. The control unit comprises a plurality of control and read-out circuits configured for controlling and reading out the plurality of qubits. Each of the control and read-out circuits is assigned to one or more of the qubits. A controlling of the quantum processor by the control unit comprises selectively powering on a subset of the control and read-out circuits during an instruction cycle, while ensuring that the remaining control and read-out circuits are powered off during the instruction cycle. The powered-on subset of control and read-out circuits is used to control a subset of the qubits and to read out data from the subset of qubits.